mainboard/intel/minnowmax: clean up includes & whitespace

Clean up as requested in commit e6df041b.
No functional changes.

Change-Id: Iec3f7ee25fd8351c7e13d660e2df6461f7745478
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6597
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/mainboard/intel/minnowmax/romstage.c

@@ -18,25 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
-#include <stddef.h>
-#include <arch/cpu.h>
-#include <lib.h>
-#include <arch/io.h>
-#include <arch/cbfs.h>
-#include <arch/stages.h>
-#include <console/console.h>
-#include <cbmem.h>
-#include <cpu/x86/mtrr.h>
-#include <romstage_handoff.h>
-#include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
 #include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
 #include <drivers/intel/fsp/fsp_util.h>
 
 /**
@@ -58,23 +40,19 @@ void get_func_disables(uint32_t *fd_mask, uint32_t *fd2_mask)
 
 }
 
-
 /**
  * /brief mainboard call for setup that needs to be done after fsp init
  *
  */
-
 void late_mainboard_romstage_entry()
 {
 
 }
 
-
 void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
 {
 	UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr;
 
-
 	/* Disable 2nd DIMM */
 	UpdData->PcdMrcInitSPDAddr2 = 0x00;