soc/intel/quark: Enumerate the PCI devices
Add the chip and domain support which enables the display of the vendor and device IDs for the PCI devices. Testing on Galileo: * Edit src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing is successful if: * The PCI vendor and device IDs are displayed. Change-Id: I517dcafd83c7dd850bc3471f939d6804a05020c3 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13719 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -16,9 +16,10 @@
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#include "chip.h"
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#include <console/console.h>
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#include <device/device.h>
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#include <fsp/ramstage.h>
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static void soc_init(void *chip_info)
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static void chip_init(void *chip_info)
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{
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/* Perform silicon specific init. */
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if (IS_ENABLED(CONFIG_RELOCATE_FSP_INTO_DRAM))
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@ -27,7 +28,30 @@ static void soc_init(void *chip_info)
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fsp_run_silicon_init(find_fsp(CONFIG_FSP_ESRAM_LOC), 0);
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}
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static void pci_domain_set_resources(device_t dev)
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{
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assign_resources(dev->link_list);
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}
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static struct device_operations pci_domain_ops = {
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.read_resources = pci_domain_read_resources,
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.set_resources = pci_domain_set_resources,
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.scan_bus = pci_domain_scan_bus,
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.ops_pci_bus = pci_bus_default_ops,
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};
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static void chip_enable_dev(device_t dev)
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{
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const char *type_name = dev_path_name(dev->path.type);
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/* Set the operations if it is a special bus type */
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printk(BIOS_DEBUG, "type: %s\n", type_name);
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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dev->ops = &pci_domain_ops;
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}
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struct chip_operations soc_intel_quark_ops = {
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CHIP_NAME("Intel Quark")
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.init = &soc_init,
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.init = &chip_init,
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.enable_dev = chip_enable_dev,
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};
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