diff --git a/src/soc/intel/xeon_sp/cpx/hob_display.c b/src/soc/intel/xeon_sp/cpx/hob_display.c index 0263472fc0..3d61a8209c 100644 --- a/src/soc/intel/xeon_sp/cpx/hob_display.c +++ b/src/soc/intel/xeon_sp/cpx/hob_display.c @@ -33,9 +33,9 @@ const char *soc_get_guid_name(const uint8_t *guid) return NULL; } -static void soc_display_memmap_hob(const struct SystemMemoryMapHob *hob_addr) +static void soc_display_memmap_hob(const struct SystemMemoryMapHob **hob_addr) { - struct SystemMemoryMapHob *hob = (struct SystemMemoryMapHob *)hob_addr; + struct SystemMemoryMapHob *hob = (struct SystemMemoryMapHob *)*hob_addr; printk(BIOS_DEBUG, "================== MEMORY MAP HOB DATA ==================\n"); printk(BIOS_DEBUG, "hob: %p, structure size: 0x%lx\n", @@ -47,6 +47,7 @@ static void soc_display_memmap_hob(const struct SystemMemoryMapHob *hob_addr) printk(BIOS_DEBUG, "\tmemSize: 0x%x, memFreq: 0x%x\n", hob->memSize, hob->memFreq); + printk(BIOS_DEBUG, "\tNumChPerMC: %d\n", hob->NumChPerMC); printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d, entry size: %ld\n", hob->numberEntries, sizeof(SYSTEM_MEMORY_MAP_ELEMENT)); for (int e = 0; e < hob->numberEntries; ++e) { @@ -56,6 +57,9 @@ static void soc_display_memmap_hob(const struct SystemMemoryMapHob *hob_addr) mem_element->ElementSize, mem_element->Type); } + printk(BIOS_DEBUG, "\tBiosFisVersion: 0x%x\n", hob->BiosFisVersion); + printk(BIOS_DEBUG, "\tMmiohBase: 0x%x\n", hob->MmiohBase); + hexdump(hob, sizeof(*hob)); } @@ -181,5 +185,5 @@ void soc_display_hob(const struct hob_header *hob) if (fsp_guid_compare(guid, fsp_hob_iio_uds_guid)) soc_display_iio_universal_data_hob((const IIO_UDS *)(guid + 16)); else if (fsp_guid_compare(guid, fsp_hob_memmap_guid)) - soc_display_memmap_hob((const struct SystemMemoryMapHob *)(guid + 16)); + soc_display_memmap_hob((const struct SystemMemoryMapHob **)(guid + 16)); } diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h index df7787a330..71ff6d5e8b 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h @@ -40,6 +40,8 @@ are permitted provided that the following conditions are met: #define MEMTYPE_2LM_MASK (1 << 1) #define MEMTYPE_VOLATILE_MASK (MEMTYPE_1LM_MASK | MEMTYPE_2LM_MASK) +#define MAX_FPGA_REMOTE_SAD_RULES 2 // Maximum FPGA sockets exists on ICX platform + #define MAX_SAD_RULES 24 #define MAX_DRAM_CLUSTERS 1 #define MAX_IMC_PER_SOCKET 2 @@ -85,7 +87,7 @@ typedef struct SystemMemoryMapElement { /* NOTE - Reserved sizes need to be calibrated if any of the above #define values change */ typedef struct SystemMemoryMapHob { - UINT8 reserved1[58]; + UINT8 reserved1[61]; UINT32 lowMemBase; // Mem base in 64MB units for below 4GB mem. UINT32 lowMemSize; // Mem size in 64MB units for below 4GB mem. @@ -96,14 +98,19 @@ typedef struct SystemMemoryMapHob { UINT8 reserved2[61]; + UINT8 NumChPerMC; UINT8 numberEntries; // Number of Memory Map Elements - SYSTEM_MEMORY_MAP_ELEMENT Element[MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES]; + SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES]; - UINT8 reserved3[24514]; + UINT8 reserved3[24518]; + + UINT16 BiosFisVersion; // Firmware Interface Specification version currently supported by BIOS + + UINT8 reserved4[8]; UINT32 MmiohBase; // MMIOH base in 64MB granularity - UINT8 reserved4[2]; + UINT8 reserved5[2]; } SYSTEM_MEMORY_MAP_HOB;