arm64: Disable MMU during legacy payload handoff (without Arm TF)

coreboot payloads expect to be entered with MMU disabled on arm64. The
usual path via Arm TF already does this, so let's align the legacy path
(without Secure Monitor) to do the same.

Change-Id: I18717e00c905123d53b27a81185b534ba819c7b3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/27878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Julius Werner 2018-08-03 17:07:51 -07:00
parent 90f025b276
commit b47b6e9f28
1 changed files with 4 additions and 1 deletions

View File

@ -15,6 +15,7 @@
#include <arch/cache.h> #include <arch/cache.h>
#include <arch/lib_helpers.h> #include <arch/lib_helpers.h>
#include <arch/mmu.h>
#include <arch/transition.h> #include <arch/transition.h>
#include <assert.h> #include <assert.h>
#include <compiler.h> #include <compiler.h>
@ -123,7 +124,9 @@ void transition(struct exc_state *exc_state)
/* SP_ELx: Initialize stack pointer */ /* SP_ELx: Initialize stack pointer */
raw_write_sp_elx(elx->sp_elx, elx_el); raw_write_sp_elx(elx->sp_elx, elx_el);
isb();
/* Payloads expect to be entered with MMU disabled. Includes an ISB. */
mmu_disable();
/* Eret to the entry point */ /* Eret to the entry point */
trans_switch(regs); trans_switch(regs);