Exynos5250: Use new chip settings for the cpu
Properly use the chip settings when configuring the CPU, at this point being purely graphics. Change-Id: I9bc2d32c1037653837937b314e4041abc0024835 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/3054 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
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@ -96,4 +96,4 @@ config SYS_TEXT_BASE
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config COREBOOT_TABLES_SIZE
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config COREBOOT_TABLES_SIZE
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hex
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hex
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default 0x100000
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default 0x4000000
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@ -1,13 +1,80 @@
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#include <stdlib.h>
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#include <string.h>
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#include <stddef.h>
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#include <delay.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <arch/cache.h>
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#include <cbmem.h>
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#include <cpu/samsung/exynos5250/cpu.h>
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#include <cpu/samsung/exynos5250/fimd.h>
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#include <cpu/samsung/exynos5-common/s5p-dp-core.h>
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#include "chip.h"
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#include "cpu.h"
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#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
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#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
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#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
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#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
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/* we distinguish a display port device from a raw graphics device
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* because there are dramatic differences in startup depending on
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* graphics usage. To make startup fast and easier to understand and
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* debug we explicitly name this common case. The alternate approach,
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* involving lots of machine and callbacks, is hard to debug and
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* verify.
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*/
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static void exynos_displayport_init(device_t dev)
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{
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int ret;
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struct cpu_samsung_exynos5250_config *conf = dev->chip_info;
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/* put these on the stack. If, at some point, we want to move
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* this code to a pre-ram stage, it will be much easier.
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*/
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vidinfo_t vi;
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struct exynos5_fimd_panel panel;
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unsigned long int fb_size;
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u32 lcdbase;
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printk(BIOS_SPEW, "%s: dev 0x%p, conf 0x%p\n", __func__, dev, conf);
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memset(&vi, 0, sizeof(vi));
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memset(&panel, 0, sizeof(panel));
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panel.is_dp = 1; /* Display I/F is eDP */
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/* while it is true that we did a memset to zero,
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* we leave some 'set to zero' entries here to make
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* it clear what's going on. Graphics is confusing.
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*/
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panel.is_mipi = 0;
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panel.fixvclk = 0;
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panel.ivclk = 0;
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panel.clkval_f = conf->clkval_f;
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panel.upper_margin = conf->upper_margin;
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panel.lower_margin = conf->lower_margin;
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panel.vsync = conf->vsync;
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panel.left_margin = conf->left_margin;
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panel.right_margin = conf->right_margin;
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panel.hsync = conf->hsync;
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vi.vl_col = conf->xres;
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vi.vl_row = conf->yres;
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vi.vl_bpix = conf->bpp;
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/*
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* The size is a magic number from hardware. Allocate enough for the
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* frame buffer and color map.
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*/
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fb_size = conf->xres * conf->yres * sizeof(unsigned long);
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lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size + 64*KiB);
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printk(BIOS_SPEW, "lcd colormap base is %p\n", (void *)(lcdbase));
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mmio_resource(dev, 0, lcdbase/KiB, 64);
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vi.cmap = (void *)lcdbase;
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lcdbase += 64*KiB;
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mmio_resource(dev, 1, lcdbase/KiB, fb_size + (KiB-1)/KiB);
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printk(BIOS_DEBUG,
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"Initializing exynos VGA, base %p\n",(void *)lcdbase);
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ret = lcd_ctrl_init(&vi, &panel, (void *)lcdbase);
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}
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static void cpu_init(device_t dev)
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static void cpu_init(device_t dev)
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{
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{
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exynos_displayport_init(dev);
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ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB);
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ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB);
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}
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}
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@ -18,22 +85,19 @@ static void cpu_noop(device_t dev)
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static struct device_operations cpu_ops = {
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static struct device_operations cpu_ops = {
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.read_resources = cpu_noop,
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.read_resources = cpu_noop,
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.set_resources = cpu_noop,
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.set_resources = cpu_noop,
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.enable_resources = cpu_noop,
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.enable_resources = cpu_init,
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.init = cpu_init,
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.init = cpu_noop,
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.scan_bus = 0,
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.scan_bus = 0,
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};
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};
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static void enable_dev(device_t dev)
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static void enable_exynos5250_dev(device_t dev)
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{
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{
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/* Set the operations if it is a special bus type */
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dev->ops = &cpu_ops;
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if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
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dev->ops = &cpu_ops;
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}
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}
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}
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struct chip_operations cpu_samsung_exynos5250_ops = {
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struct chip_operations cpu_samsung_exynos5250_ops = {
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CHIP_NAME("CPU Samsung Exynos 5250")
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CHIP_NAME("CPU Samsung Exynos 5250")
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.enable_dev = enable_dev,
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.enable_dev = enable_exynos5250_dev,
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};
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};
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void exynos5250_config_l2_cache(void)
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void exynos5250_config_l2_cache(void)
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