From b4a68a5a28684b99657ae94b9bcb745ae2023863 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 15 Dec 2019 13:30:38 +1100 Subject: [PATCH] src/soc/intel/cannonlake: Bump MAX_CPU from 8->12 This impacts boards: hatch (&variants) and drallion. Some variants like Puff can have up to 12 cores. coreboot should take the min() where MAX_CPU is the upper bound. Further to that, boards themseleves shouldn't be setting the MAX_CPUS, the chipset should be and so do that. BRANCH=none BUG=b:146255011 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: I284d027886f662ebb8414ea92540916ed19bc797 Signed-off-by: Edward O'Callaghan Reviewed-on: https://review.coreboot.org/c/coreboot/+/37725 Tested-by: build bot (Jenkins) Reviewed-by: EricR Lai Reviewed-by: Shelley Chen Reviewed-by: Mathew King --- src/mainboard/google/drallion/Kconfig | 4 ---- src/mainboard/google/hatch/Kconfig | 4 ---- src/soc/intel/cannonlake/Kconfig | 4 ++++ 3 files changed, 4 insertions(+), 8 deletions(-) diff --git a/src/mainboard/google/drallion/Kconfig b/src/mainboard/google/drallion/Kconfig index fd7b6b19d4..e9e26a3832 100644 --- a/src/mainboard/google/drallion/Kconfig +++ b/src/mainboard/google/drallion/Kconfig @@ -71,10 +71,6 @@ config MAINBOARD_PART_NUMBER string default "Drallion" if BOARD_GOOGLE_DRALLION -config MAX_CPUS - int - default 8 - config UART_FOR_CONSOLE int default 0 if BOARD_GOOGLE_DRALLION diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 98a0174dfe..dff5273714 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -98,10 +98,6 @@ config MAINBOARD_PART_NUMBER default "Puff" if BOARD_GOOGLE_PUFF default "Stryke" if BOARD_GOOGLE_STRYKE -config MAX_CPUS - int - default 8 - config OVERRIDE_DEVICETREE string default "variants/helios_diskswap/overridetree.cb" if BOARD_GOOGLE_HELIOS_DISKSWAP diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 6d635ade3d..8820508259 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -108,6 +108,10 @@ config CPU_SPECIFIC_OPTIONS select FSP_T_XIP if FSP_CAR select HECI_DISABLE_USING_SMM if !SOC_INTEL_COFFEELAKE && !SOC_INTEL_WHISKEYLAKE && !SOC_INTEL_COMETLAKE +config MAX_CPUS + int + default 12 + config DCACHE_RAM_BASE default 0xfef00000