soc/amd/genoa/reset.c: Add reset methods

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ifb4d7dda5fcf1ccacb901b24e4f7cf6945ee16e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76503
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/amd/onyx/Kconfig

@@ -3,7 +3,6 @@ if BOARD_AMD_ONYX
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select SOC_AMD_GENOA
-	select MISSING_BOARD_RESET
 	select BOARD_ROMSIZE_KB_32768
 
 config FMDFILE

src/soc/amd/genoa/Makefile.inc

@@ -2,6 +2,7 @@
 ifeq ($(CONFIG_SOC_AMD_GENOA),y)
 
 all-y		+= mmap_boot.c
+all-y		+= reset.c
 all-y		+= config.c
 
 bootblock-y	+= early_fch.c

src/soc/amd/genoa/reset.c

@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/io.h>
+#include <cf9_reset.h>
+#include <reset.h>
+#include <soc/southbridge.h>
+#include <amdblocks/acpimmio.h>
+#include <amdblocks/reset.h>
+
+void do_cold_reset(void)
+{
+	/* De-assert and then assert all PwrGood signals on CF9 reset. */
+	pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) |
+		TOGGLE_ALL_PWR_GOOD);
+	outb(RST_CPU | SYS_RST, RST_CNT);
+}
+
+void do_warm_reset(void)
+{
+	/* Warm resets are not supported and must be executed as cold */
+	do_cold_reset();
+}
+
+void do_board_reset(void)
+{
+	do_cold_reset();
+}