libpayload/storage/ahci: Use pacc pointer to read device class

The PCI bus gets already scanned while gathering system information.
Therefore, use the pacc pointer from sysinfo_t to read the device class
of PCI devices instead of rescanning the bus.

Change-Id: I4c79e71777e718f5065107ebf780ca9fdb4f1b0c
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Felix Singer 2020-10-14 18:44:49 +02:00 committed by Nico Huber
parent 9e5bc74cc7
commit b4b73d4995
4 changed files with 17 additions and 19 deletions

View File

@ -227,7 +227,8 @@ static u32 working_controllers[] = {
0x8086 | 0x5ae3 << 16, /* Apollo Lake */ 0x8086 | 0x5ae3 << 16, /* Apollo Lake */
}; };
#endif #endif
static void ahci_init_pci(pcidev_t dev)
void ahci_initialize(pcidev_t dev)
{ {
int i; int i;
@ -282,19 +283,3 @@ static void ahci_init_pci(pcidev_t dev)
ahci_port_probe(ctrl, &ports[i], i + 1); ahci_port_probe(ctrl, &ports[i], i + 1);
} }
} }
void ahci_initialize(void)
{
int bus, dev, func;
for (bus = 0; bus < 256; ++bus) {
for (dev = 0; dev < 32; ++dev) {
const u16 class =
pci_read_config16(PCI_DEV(bus, dev, 0), 0xa);
if (class != 0xffff) {
for (func = 0; func < 8; ++func)
ahci_init_pci(PCI_DEV(bus, dev, func));
}
}
}
}

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@ -27,6 +27,7 @@
*/ */
#include <libpayload.h> #include <libpayload.h>
#include <pci/pci.h>
#if CONFIG(LP_STORAGE_AHCI) #if CONFIG(LP_STORAGE_AHCI)
# include <storage/ahci.h> # include <storage/ahci.h>
#endif #endif
@ -108,7 +109,18 @@ ssize_t storage_read_blocks512(const size_t dev_num,
*/ */
void storage_initialize(void) void storage_initialize(void)
{ {
#if CONFIG(LP_PCI)
struct pci_dev *dev;
for (dev = lib_sysinfo.pacc.devices; dev; dev = dev->next) {
switch (dev->device_class) {
#if CONFIG(LP_STORAGE_AHCI) #if CONFIG(LP_STORAGE_AHCI)
ahci_initialize(); case PCI_CLASS_STORAGE_AHCI:
ahci_initialize(PCI_DEV(dev->bus, dev->dev, dev->func));
break;
#endif
default:
break;
}
}
#endif #endif
} }

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@ -66,6 +66,7 @@
#define PCI_ROM_ADDRESS1 0x38 // on bridges #define PCI_ROM_ADDRESS1 0x38 // on bridges
#define PCI_ROM_ADDRESS_MASK ~0x7ff #define PCI_ROM_ADDRESS_MASK ~0x7ff
#define PCI_CLASS_STORAGE_AHCI 0x0106
#define PCI_CLASS_MEMORY_OTHER 0x0580 #define PCI_CLASS_MEMORY_OTHER 0x0580
#define PCI_VENDOR_ID_INTEL 0x8086 #define PCI_VENDOR_ID_INTEL 0x8086

View File

@ -29,6 +29,6 @@
#ifndef _STORAGE_AHCI_H #ifndef _STORAGE_AHCI_H
#define _STORAGE_AHCI_H #define _STORAGE_AHCI_H
void ahci_initialize(void); void ahci_initialize(pcidev_t dev);
#endif #endif