From b4d7116a740b2847ef112cc1954462dac0b4cf85 Mon Sep 17 00:00:00 2001 From: Wonkyu Kim Date: Wed, 20 May 2020 13:25:04 -0700 Subject: [PATCH] soc/intel/tigerlake: Delete unused configuration Delete below configuration - Heci3Enabled: deprecated, see https://review.coreboot.org/cgit/coreboot.git/tree/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h#n442 - PchIshEnable: don't need as it's handled by devicetree dev on/off, see https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/tigerlake/romstage/fsp_params.c#n87 BUG:b:151166877 BRANCH=none TEST=Build and boot to OS Signed-off-by: Wonkyu Kim Change-Id: If96cc7db7118dd6c2ac02aab3bb0c96763ffc722 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41572 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/chip.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 46c2d417a5..86e703b055 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -136,12 +136,6 @@ struct soc_intel_tigerlake_config { /* SMBus */ uint8_t SmbusEnable; - /* Integrated Sensor */ - uint8_t PchIshEnable; - - /* Heci related */ - uint8_t Heci3Enabled; - /* Gfx related */ uint8_t IgdDvmt50PreAlloc; uint8_t InternalGfx;