mainboard/intel/cannonlake_rvp: Add Sleep states
Add sleep state to DSDT table. Change-Id: Ic14e34e29d5f881949765dee5c6b433c1499c491 Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Reviewed-on: https://review.coreboot.org/21976 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
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@ -39,4 +39,8 @@ DefinitionBlock(
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// Chrome OS specific
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#include <vendorcode/google/chromeos/acpi/chromeos.asl>
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#endif
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// Chipset specific sleep states
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#include <soc/intel/cannonlake/acpi/sleepstates.asl>
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}
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