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mainboard/intel/cannonlake_rvp: Add Sleep states

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Add sleep state to DSDT table.

Change-Id: Ic14e34e29d5f881949765dee5c6b433c1499c491
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/21976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
This commit is contained in:
Vaibhav Shankar 2017-10-11 17:37:53 -07:00 committed by Aaron Durbin
parent 4df1c4cedb
commit b4e275f97b
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/intel/cannonlake_rvp/dsdt.asl
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@ -39,4 +39,8 @@ DefinitionBlock(
// Chrome OS specific // Chrome OS specific
#include <vendorcode/google/chromeos/acpi/chromeos.asl> #include <vendorcode/google/chromeos/acpi/chromeos.asl>
#endif #endif
// Chipset specific sleep states
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
} }