rk3288: Pass SPI bus speed in as parameter to init function

This re-factors rockchip_spi to remove speed_hz which will instead be
passed in via rockchip_spi_init(), thus making it easier to support
other boards which may have different slave devices attached.

BUG=none
BRANCH=none
TEST=built and booted on Pinky

Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: I7baf0fa0a2660e3c975847fdec3eb92bcd0d6c10
Original-Reviewed-on: https://chromium-review.googlesource.com/220411
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

(cherry picked from commit de33d2ed6352fc4c8e81dc53451f164a8792daf2)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Ie6473e47d50b7e633688185e8d8036980b833f1c
Reviewed-on: http://review.coreboot.org/9245
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
David Hendricks 2014-09-29 13:48:40 -07:00 committed by Aaron Durbin
parent f4305468d7
commit b4ff291cf6
3 changed files with 5 additions and 9 deletions

View File

@ -32,11 +32,11 @@ void bootblock_mainboard_init(void)
/* spi2 for firmware ROM */ /* spi2 for firmware ROM */
writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk); writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk);
writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx); writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx);
rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS); rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11000000);
/* spi0 for chrome ec */ /* spi0 for chrome ec */
writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0); writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0);
rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 9000000);
setup_chromeos_gpios(); setup_chromeos_gpios();
} }

View File

@ -33,7 +33,6 @@
struct rockchip_spi_slave { struct rockchip_spi_slave {
struct spi_slave slave; struct spi_slave slave;
struct rockchip_spi *regs; struct rockchip_spi *regs;
unsigned int speed_hz;
unsigned int fifo_size; unsigned int fifo_size;
}; };
@ -47,13 +46,11 @@ static struct rockchip_spi_slave rockchip_spi_slaves[3] = {
.rw = SPI_READ_FLAG | SPI_WRITE_FLAG, .rw = SPI_READ_FLAG | SPI_WRITE_FLAG,
}, },
.regs = (void *)SPI0_BASE, .regs = (void *)SPI0_BASE,
.speed_hz = 9000000,
.fifo_size = 32, .fifo_size = 32,
}, },
{ {
.slave = {.bus = 1, .rw = SPI_READ_FLAG,}, .slave = {.bus = 1, .rw = SPI_READ_FLAG,},
.regs = (void *)SPI1_BASE, .regs = (void *)SPI1_BASE,
.speed_hz = 11000000,
.fifo_size = 32, .fifo_size = 32,
}, },
{ {
@ -62,7 +59,6 @@ static struct rockchip_spi_slave rockchip_spi_slaves[3] = {
.rw = SPI_READ_FLAG | SPI_WRITE_FLAG, .rw = SPI_READ_FLAG | SPI_WRITE_FLAG,
}, },
.regs = (void *)SPI2_BASE, .regs = (void *)SPI2_BASE,
.speed_hz = 11000000,
.fifo_size = 32, .fifo_size = 32,
}, },
@ -110,7 +106,7 @@ static void rockchip_spi_set_clk(struct rockchip_spi *regs, unsigned int hz)
writel(clk_div, &regs->baudr); writel(clk_div, &regs->baudr);
} }
void rockchip_spi_init(unsigned int bus) void rockchip_spi_init(unsigned int bus, unsigned int speed_hz)
{ {
struct rockchip_spi_slave *espi = &rockchip_spi_slaves[bus]; struct rockchip_spi_slave *espi = &rockchip_spi_slaves[bus];
struct rockchip_spi *regs = espi->regs; struct rockchip_spi *regs = espi->regs;
@ -118,7 +114,7 @@ void rockchip_spi_init(unsigned int bus)
rkclk_configure_spi(bus, SPI_SRCCLK_HZ); rkclk_configure_spi(bus, SPI_SRCCLK_HZ);
rockchip_spi_enable_chip(regs, 0); rockchip_spi_enable_chip(regs, 0);
rockchip_spi_set_clk(regs, espi->speed_hz); rockchip_spi_set_clk(regs, speed_hz);
/* Operation Mode */ /* Operation Mode */
ctrlr0 = (SPI_OMOD_MASTER << SPI_OMOD_OFFSET); ctrlr0 = (SPI_OMOD_MASTER << SPI_OMOD_OFFSET);

View File

@ -199,6 +199,6 @@ check_member(rockchip_spi, rxdr, 0x800);
int initialize_rockchip_spi_cbfs_media(struct cbfs_media *media, int initialize_rockchip_spi_cbfs_media(struct cbfs_media *media,
void *buffer_address, void *buffer_address,
size_t buffer_size); size_t buffer_size);
void rockchip_spi_init(unsigned int bus); void rockchip_spi_init(unsigned int bus, unsigned int speed_hz);
#endif #endif