soc/ti/am335x: Enable MMU in bootblock
Enables the MMU primarily to allow the unaligned word reads that the FMAP code requires. Without enabling this, the chip gets data access exceptions. Enabling the MMU also gives some advantages in allowing the icache and dcache to be enabled, so is probably worth doing regardless. Change-Id: Ic571570cc44b0696ea61cc76e3bce7167a3256cf Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44382 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -4,13 +4,25 @@
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#include <arch/cache.h>
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#include <bootblock_common.h>
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#include <symbols.h>
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#define SRAM_START ((uintptr_t)_sram / MiB)
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#define SRAM_END (DIV_ROUND_UP((uintptr_t)_esram, MiB))
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#define DRAM_START ((uintptr_t)_dram / MiB)
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#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
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void bootblock_soc_init(void)
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{
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uint32_t sctlr;
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mmu_init();
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/* enable dcache */
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sctlr = read_sctlr();
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sctlr |= SCTLR_C;
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write_sctlr(sctlr);
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/* Map everything strongly ordered by default */
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mmu_config_range(0, 4096, DCACHE_OFF);
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mmu_config_range(SRAM_START, SRAM_END - SRAM_START,
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DCACHE_WRITEBACK);
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mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
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dcache_mmu_enable();
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}
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@ -3,7 +3,6 @@
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#include <boot_device.h>
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#include <symbols.h>
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/* FIXME: No idea how big the internal SRAM actually is. */
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static const struct mem_region_device boot_dev =
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MEM_REGION_DEV_RO_INIT(_sram, CONFIG_ROM_SIZE);
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@ -8,17 +8,16 @@ SECTIONS
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{
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SRAM_START(0x402f0400)
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BOOTBLOCK(0x402f0400, 20K)
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ROMSTAGE(0x402f5400, 88K)
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FMAP_CACHE(0x4030b400, 2K)
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FMAP_CACHE(0x402f0400+20K, 2K)
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TTB(0x402F8000, 16K)
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ROMSTAGE(0x402F8000+16K, 40K)
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STACK(0x4030be00, 4K)
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SRAM_END(0x40310000)
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DRAM_START(0x80000000)
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RAMSTAGE(0x80200000, 192K)
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/* TODO: Implement MMU support and move TTB to a better location. */
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TTB(0x81000000, 16K)
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#ifdef OMAP_HEADER
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.header : {
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*(.header);
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