soc/intel/alderlake: Implement API to disable UFS controllers
This patch implements a new API to make the UFS controller function disabled. Additionally, perform a warm reset post disabling the UFS controller to let PMC know about the state of the UFS controller and disable the MPHY clock. BUG=b:264838335 TEST=Able to build and boot Google/Marasov successfully. From the AP log, I am able to confirm that UFS is function disabled using PSF. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I940a634f70f8c97ef1234866d4c5a1ff224c6e24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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@ -2,11 +2,13 @@
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#include <arch/romstage.h>
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#include <cbmem.h>
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#include <cf9_reset.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <intelblocks/cfg.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/early_graphics.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/pmclib.h>
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#include <intelblocks/smbus.h>
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#include <intelblocks/thermal.h>
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@ -21,6 +23,23 @@
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#include <timestamp.h>
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#include <string.h>
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#include <security/intel/txt/txt.h>
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#include <soc/pcr_ids.h>
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#define PSF_UFS0_BASE_ADDRESS 0x280
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#define PSF_UFS1_BASE_ADDRESS 0x300
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#define PCR_PSFX_T0_SHDW_PCIEN 0x1C
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#define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS (1 << 8)
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static void disable_ufs(void)
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{
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/* disable USF0 */
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pcr_or32(PID_PSF2, PSF_UFS0_BASE_ADDRESS + PCR_PSFX_T0_SHDW_PCIEN,
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PCR_PSFX_T0_SHDW_PCIEN_FUNDIS);
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/* disable USF1 */
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pcr_or32(PID_PSF2, PSF_UFS1_BASE_ADDRESS + PCR_PSFX_T0_SHDW_PCIEN,
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PCR_PSFX_T0_SHDW_PCIEN_FUNDIS);
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}
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#include "ux.h"
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@ -164,6 +183,17 @@ void mainboard_romstage_entry(void)
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timestamp_add_now(TS_CSE_FW_SYNC_END);
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}
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/* Program to Disable UFS Controllers */
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if (!is_devfn_enabled(PCH_DEVFN_UFS) &&
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(CONFIG(USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS))) {
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printk(BIOS_INFO, "Disabling UFS controllers\n");
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disable_ufs();
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if (ps->prev_sleep_state == ACPI_S5) {
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printk(BIOS_INFO, "Warm Reset after disabling UFS controllers\n");
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system_reset();
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}
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}
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/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
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systemagent_early_init();
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/* Program SMBus base address and enable it */
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