ACPI: Have common acpi_fill_mcfg()
As long as there is only one PCI segment we do not need more complicated MCFG generation. Change-Id: Ic2a8e84383883039bb7f994227e2e425366f9e13 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -263,6 +263,13 @@ void acpi_create_madt(acpi_madt_t *madt)
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header->checksum = acpi_checksum((void *)madt, header->length);
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}
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static unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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/* MCFG is defined in the PCI Firmware Specification 3.0. */
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void acpi_create_mcfg(acpi_mcfg_t *mcfg)
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{
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@ -284,7 +291,8 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg)
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header->length = sizeof(acpi_mcfg_t);
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header->revision = get_acpi_table_revision(MCFG);
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current = acpi_fill_mcfg(current);
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if (CONFIG(MMCONF_SUPPORT))
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current = acpi_fill_mcfg(current);
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/* (Re)calculate length and checksum. */
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header->length = current - (unsigned long)mcfg;
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@ -1217,7 +1217,6 @@ unsigned long fw_cfg_acpi_tables(unsigned long start);
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/* These are implemented by the target port or north/southbridge. */
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unsigned long write_acpi_tables(unsigned long addr);
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unsigned long acpi_fill_madt(unsigned long current);
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unsigned long acpi_fill_mcfg(unsigned long current);
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unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current);
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void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id);
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void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length);
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@ -12,11 +12,3 @@ void mainboard_fill_fadt(acpi_fadt_t *fadt)
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fadt->acpi_enable = 0;
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fadt->acpi_disable = 0;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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@ -9,12 +9,6 @@
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#include "e7505.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* Just a dummy */
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return current;
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}
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static void mch_domain_read_resources(struct device *dev)
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{
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int idx;
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@ -11,14 +11,6 @@
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#include "gm45.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static unsigned long acpi_fill_dmar(unsigned long current)
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{
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const struct device *dev;
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@ -9,14 +9,6 @@
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#include "haswell.h"
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#include <southbridge/intel/lynxpoint/pch.h>
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static unsigned long acpi_fill_dmar(unsigned long current)
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{
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struct device *const igfx_dev = pcidev_on_root(2, 0);
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@ -7,7 +7,6 @@ bootblock-y += bootblock.c
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ramstage-y += memmap.c
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ramstage-y += northbridge.c
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ramstage-y += gma.c
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ramstage-y += acpi.c
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romstage-y += romstage.c
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romstage-y += memmap.c
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@ -1,14 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <acpi/acpigen.h>
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#include <device/device.h>
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#include "i945.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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@ -9,8 +9,6 @@ ramstage-y += northbridge.c
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ramstage-y += smi.c
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ramstage-y += gma.c
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ramstage-y += acpi.c
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romstage-y += memmap.c
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romstage-y += raminit.c
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romstage-y += raminit_tables.c
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@ -1,12 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include "ironlake.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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@ -8,7 +8,6 @@ bootblock-y += bootblock.c
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ramstage-y += memmap.c
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ramstage-y += northbridge.c
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ramstage-y += gma.c
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ramstage-y += acpi.c
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romstage-y += romstage.c
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romstage-y += memmap.c
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@ -1,13 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpigen.h>
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#include <acpi/acpi.h>
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#include <device/device.h>
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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@ -9,14 +9,6 @@
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#include "sandybridge.h"
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#include <southbridge/intel/bd82x6x/pch.h>
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static unsigned long acpi_create_igfx_rmrr(const unsigned long current)
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{
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const u32 base_mask = ~(u32)(MiB - 1);
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@ -6,14 +6,6 @@
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#include <device/device.h>
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#include "x4x.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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unsigned long northbridge_write_acpi_tables(const struct device *device,
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unsigned long start,
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struct acpi_rsdp *rsdp)
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@ -17,18 +17,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
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return acpi_write_hpet(device, current, rsdp);
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS,
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0,
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0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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unsigned long acpi_fill_madt_irqoverride(unsigned long current)
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{
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const struct soc_amd_common_config *cfg = soc_get_common_config();
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@ -86,13 +86,6 @@ int acpi_sci_irq(void)
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return sci_irq;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* Local APICs */
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@ -108,13 +108,6 @@ int acpi_sci_irq(void)
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return sci_irq;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static acpi_tstate_t soc_tss_table[] = {
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{ 100, 1000, 0, 0x00, 0 },
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{ 88, 875, 0, 0x1e, 0 },
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@ -21,14 +21,6 @@
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#include <soc/systemagent.h>
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#include <soc/intel/broadwell/chip.h>
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static unsigned long acpi_fill_dmar(unsigned long current)
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{
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struct device *const igfx_dev = pcidev_path_on_root(SA_DEVFN_IGD);
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@ -23,15 +23,6 @@
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#define CPUID_6_EAX_ISST (1 << 7)
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__attribute__((weak)) unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* PCI Segment Group 0, Start Bus Number 0, End Bus Number is 255 */
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current += acpi_create_mcfg_mmconfig((void *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static int acpi_sci_irq(void)
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{
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int sci_irq = 9;
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@ -81,15 +81,6 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries)
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return cstate_map;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* PCI Segment Group 0, Start Bus Number 0, End Bus Number is 255 */
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current += acpi_create_mcfg_mmconfig((void *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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void soc_fill_fadt(acpi_fadt_t *fadt)
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{
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u16 pmbase = get_pmbase();
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@ -10,11 +10,6 @@ unsigned long acpi_fill_madt(unsigned long current)
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return current;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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return current;
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}
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC,
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@ -318,14 +318,6 @@ static const char *lpc_acpi_name(const struct device *dev)
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return NULL;
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static void lpc_final(struct device *dev)
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{
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if (!acpi_is_wakeup_s3()) {
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@ -121,14 +121,6 @@ static void lpc_init(struct device *dev)
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printk(BIOS_DEBUG, "SB800 - Late.c - %s - End.\n", __func__);
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static const char *lpc_acpi_name(const struct device *dev)
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{
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if (dev->path.type != DEVICE_PATH_PCI)
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@ -318,16 +318,6 @@ static void hudson_lpc_enable_resources(struct device *dev)
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hudson_lpc_enable_childrens_resources(dev);
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
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CONFIG_MMCONF_BASE_ADDRESS,
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0,
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0,
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CONFIG_MMCONF_BUS_NUMBER - 1);
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return current;
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}
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static const char *lpc_acpi_name(const struct device *dev)
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{
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if (dev->path.type != DEVICE_PATH_PCI)
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@ -38,9 +38,3 @@ void generate_cpu_entries(const struct device *device)
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}
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acpigen_pop_len();
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}
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* chipset doesn't have mmconfig */
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return current;
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}
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