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intel/lynxpoint: Fix spelling 

Change-Id: I684e1962a9d4312ee9fad4ada70323b02ca3ae48
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-01-06 10:41:41 +02:00
parent 438f861663
commit b544c00056
2 changed files with 2 additions and 2 deletions
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2
src/southbridge/intel/lynxpoint/bootblock.c
View File

@ -54,7 +54,7 @@ static void map_rcba(void)
static void enable_port80_on_lpc(void) static void enable_port80_on_lpc(void)
{ {
/* Enable port 80 POST on LPC. The chipset does this by deafult, /* Enable port 80 POST on LPC. The chipset does this by default,
* but it doesn't appear to hurt anything. */ * but it doesn't appear to hurt anything. */
u32 gcs = RCBA32(GCS); u32 gcs = RCBA32(GCS);
gcs = gcs & ~0x4; gcs = gcs & ~0x4;

2
src/southbridge/intel/lynxpoint/lpc.c
View File

@ -660,7 +660,7 @@ static void pch_lpc_add_gen_io_resources(struct device *dev, int reg_value,
{ {
/* /*
* Check if the register is enabled. If so and the base exceeds the * Check if the register is enabled. If so and the base exceeds the
* device's deafult claim range add the resoure. * device's default, claim range and add the resource.
*/ */
if (reg_value & 1) { if (reg_value & 1) {
u16 base = reg_value & 0xfffc; u16 base = reg_value & 0xfffc;