mb/google/brya/var/nereid: Enable OZ711LV2LN SD card controller
Select the Bayhub LV2 driver, and implement power sequencing as per the datasheet. BUG=b:223304542 TEST=Check that connecting an SD card works as expected in the OS. Probe the EN and RST signals and check the timing requirements are met. Change-Id: Id1cca2024e06e5b2c7cefd22aa0b735bc542dc3b Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
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@ -92,6 +92,7 @@ config BOARD_GOOGLE_NEREID
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bool "-> Nereid"
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select ALDERLAKE_CONFIGURE_DESCRIPTOR
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select BOARD_GOOGLE_BASEBOARD_NISSA
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select DRIVERS_GENERIC_BAYHUB_LV2
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select DRIVERS_GENERIC_GPIO_KEYS
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config BOARD_GOOGLE_PRIMUS
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@ -43,6 +43,8 @@ static const struct pad_config override_gpio_table[] = {
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static const struct pad_config early_gpio_table[] = {
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/* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
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PAD_CFG_GPO(GPP_B11, 0, DEEP),
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/* H12 : UART0_RTS# ==> SD_PERST_L */
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PAD_CFG_GPO(GPP_H12, 0, DEEP),
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/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
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PAD_CFG_GPO(GPP_H20, 0, DEEP),
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/* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
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@ -59,11 +61,15 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
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/* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
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PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
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/* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
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PAD_CFG_GPO(GPP_H13, 1, DEEP),
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};
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static const struct pad_config romstage_gpio_table[] = {
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/* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
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PAD_CFG_GPO(GPP_B11, 1, DEEP),
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/* H12 : UART0_RTS# ==> SD_PERST_L */
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PAD_CFG_GPO(GPP_H12, 1, DEEP),
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};
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const struct pad_config *variant_gpio_override_table(size_t *num)
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