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mb/google/brya/var/nereid: Enable OZ711LV2LN SD card controller 

Select the Bayhub LV2 driver, and implement power sequencing as per the
datasheet.

BUG=b:223304542
TEST=Check that connecting an SD card works as expected in the OS. Probe
the EN and RST signals and check the timing requirements are met.

Change-Id: Id1cca2024e06e5b2c7cefd22aa0b735bc542dc3b
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
This commit is contained in:
Reka Norman 2022-04-07 15:43:30 +10:00 committed by Felix Held
parent e7a14cf9af
commit b5994be2e8
2 changed files with 7 additions and 0 deletions
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1
src/mainboard/google/brya/Kconfig.name
View File

@ -92,6 +92,7 @@ config BOARD_GOOGLE_NEREID
bool "-> Nereid" bool "-> Nereid"
select ALDERLAKE_CONFIGURE_DESCRIPTOR select ALDERLAKE_CONFIGURE_DESCRIPTOR
select BOARD_GOOGLE_BASEBOARD_NISSA select BOARD_GOOGLE_BASEBOARD_NISSA
select DRIVERS_GENERIC_BAYHUB_LV2
select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_GPIO_KEYS
config BOARD_GOOGLE_PRIMUS config BOARD_GOOGLE_PRIMUS

6
src/mainboard/google/brya/variants/nereid/gpio.c
View File

@ -43,6 +43,8 @@ static const struct pad_config override_gpio_table[] = {
static const struct pad_config early_gpio_table[] = { static const struct pad_config early_gpio_table[] = {
/* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */ /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
PAD_CFG_GPO(GPP_B11, 0, DEEP), PAD_CFG_GPO(GPP_B11, 0, DEEP),
/* H12 : UART0_RTS# ==> SD_PERST_L */
PAD_CFG_GPO(GPP_H12, 0, DEEP),
/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_H20, 0, DEEP), PAD_CFG_GPO(GPP_H20, 0, DEEP),
/* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
@ -59,11 +61,15 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
PAD_CFG_GPO(GPP_H13, 1, DEEP),
}; };
static const struct pad_config romstage_gpio_table[] = { static const struct pad_config romstage_gpio_table[] = {
/* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */ /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
PAD_CFG_GPO(GPP_B11, 1, DEEP), PAD_CFG_GPO(GPP_B11, 1, DEEP),
/* H12 : UART0_RTS# ==> SD_PERST_L */
PAD_CFG_GPO(GPP_H12, 1, DEEP),
}; };
const struct pad_config *variant_gpio_override_table(size_t *num) const struct pad_config *variant_gpio_override_table(size_t *num)