diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb index 7a60885de6..b98f34d4d1 100644 --- a/src/mainboard/pcengines/apu1/devicetree.cb +++ b/src/mainboard/pcengines/apu1/devicetree.cb @@ -83,7 +83,7 @@ chip northbridge/amd/agesa/family14/root_complex device pci 15.3 off end # PCIe PortD device pci 16.0 on end # OHCI USB 10-13 device pci 16.2 on end # EHCI USB 10-13 - register "gpp_configuration" = "0" + register "gpp_configuration" = "4" # GPP_CFGMODE_X1111 register "disconnect_pcib" = "1" register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE end #southbridge/amd/cimx/sb800 diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index 08051ec5b7..df2b0ecf30 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -185,7 +185,7 @@ * GPP_CFGMODE_X2110 * GPP_CFGMODE_X1111 */ -#define GPP_CFGMODE GPP_CFGMODE_X4000 +#define GPP_CFGMODE GPP_CFGMODE_X1111 /** * @def NB_SB_GEN2 @@ -206,7 +206,7 @@ * TRUE - ports visible always, even port empty * FALSE - ports invisible if port empty */ -#define SB_GPP_UNHIDE_PORTS TRUE +#define SB_GPP_UNHIDE_PORTS FALSE /** * @def GEC_CONFIG