mb/{lenovo,packardbell}: Enable MEI device

Enable the MEI in device trees of some Ibex Peak, Cougar Point and
Panther Point boards where they have been disabled.

Change-Id: I4327d19d3ed1a93a6466057f6eceed49ab9441c5
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
This commit is contained in:
Evgeny Zinoviev 2020-06-16 04:41:48 +03:00 committed by Alexander Couzens
parent 2dfa65368e
commit b5d402e388
5 changed files with 9 additions and 5 deletions

View File

@ -47,7 +47,7 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT

View File

@ -53,7 +53,9 @@ chip northbridge/intel/ironlake
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
device pci 16.0 off end # MEI
device pci 16.0 on # MEI
subsystemid 0x17aa 0x215f
end
device pci 16.2 on # IDE/SATA
subsystemid 0x17aa 0x2161
end

View File

@ -65,7 +65,7 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT

View File

@ -61,7 +61,7 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT

View File

@ -46,7 +46,9 @@ chip northbridge/intel/ironlake
register "alt_gp_smi_en" = "0x0000"
register "gen1_dec" = "0x040069"
device pci 16.0 off end # Management Engine Interface 1
device pci 16.0 on # Management Engine Interface 1
subsystemid 0x1025 0x0379
end
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R, only management boot
device pci 16.3 off end # Management Engine KT