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mb/*: Replace SNB PCI devices with references from chipset.cb 

Removing default on/off from mainboard devicetrees is left as a follow-up.

Change-Id: I74c34a97ea4340fb11a0db422a48e1418221627e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69502
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Arthur Heymans 2022-11-12 14:51:49 +01:00 committed by Paul Fagerburg
parent 9ce7935b49
commit b5df65a9aa
42 changed files with 1048 additions and 1016 deletions
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50
src/mainboard/apple/macbookair4_2/devicetree.cb
View File

@ -26,67 +26,67 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
register "sata_interface_speed_support" = "0x3" register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x1" register "sata_port_map" = "0x1"
device pci 16.0 on # Management Engine Interface 1 device ref mei1 on # Management Engine Interface 1
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 16.1 off # Management Engine Interface 2 device ref mei2 off # Management Engine Interface 2
end end
device pci 16.2 off # Management Engine IDE-R device ref me_ide_r off # Management Engine IDE-R
end end
device pci 16.3 off # Management Engine KT device ref me_kt off # Management Engine KT
end end
device pci 19.0 off # Intel Gigabit Ethernet device ref gbe off # Intel Gigabit Ethernet
end end
device pci 1a.0 on # USB2 EHCI #2 Unsupported PCI device 8086:1c2c device ref ehci2 on # USB2 EHCI #2 Unsupported PCI device 8086:1c2c
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1b.0 on # High Definition Audio Audio controller device ref hda on # High Definition Audio Audio controller
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1c.0 on # PCIe Port #1 device ref pcie_rp1 on # PCIe Port #1
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1c.1 on # PCIe Port #2 device ref pcie_rp2 on # PCIe Port #2
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1c.2 off # PCIe Port #3 device ref pcie_rp3 off # PCIe Port #3
end end
device pci 1c.3 off # PCIe Port #4 device ref pcie_rp4 off # PCIe Port #4
end end
device pci 1c.4 off # PCIe Port #5 device ref pcie_rp5 off # PCIe Port #5
end end
device pci 1c.5 off # PCIe Port #6 device ref pcie_rp6 off # PCIe Port #6
end end
device pci 1c.6 off # PCIe Port #7 device ref pcie_rp7 off # PCIe Port #7
end end
device pci 1c.7 off # PCIe Port #8 device ref pcie_rp8 off # PCIe Port #8
end end
device pci 1d.0 on # USB2 EHCI #1 Unsupported PCI device 8086:1c27 device ref ehci1 on # USB2 EHCI #1 Unsupported PCI device 8086:1c27
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1e.0 off # PCI bridge device ref pci_bridge off # PCI bridge
end end
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1f.2 on # SATA Controller 1 device ref sata1 on # SATA Controller 1
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1f.3 on # SMBus device ref smbus on # SMBus
subsystemid 0x8086 0x7270 subsystemid 0x8086 0x7270
end end
device pci 1f.5 off # SATA Controller 2 device ref sata2 off # SATA Controller 2
end end
device pci 1f.6 off # Thermal device ref thermal off # Thermal
end end
end end
device pci 00.0 on # Host bridge Host bridge device ref host_bridge on # Host bridge Host bridge
subsystemid 0x106b 0x00eb subsystemid 0x106b 0x00eb
end end
device pci 01.0 on # PCIe Bridge for discrete graphics Unsupported PCI device 8086:0101 device ref peg10 on # PCIe Bridge for discrete graphics Unsupported PCI device 8086:0101
subsystemid 0x106b 0x00eb subsystemid 0x106b 0x00eb
end end
device pci 02.0 on # Internal graphics VGA controller device ref igd on # Internal graphics VGA controller
subsystemid 0x106b 0x00eb subsystemid 0x106b 0x00eb
end end
device pci 1a.7 on device pci 1a.7 on

52
src/mainboard/asrock/b75pro3-m/devicetree.cb
View File

@ -15,13 +15,13 @@ chip northbridge/intel/sandybridge
register "gpu_pch_backlight" = "0x00000000" register "gpu_pch_backlight" = "0x00000000"
device domain 0 on device domain 0 on
device pci 00.0 on device ref host_bridge on
subsystemid 0x1849 0x0150 subsystemid 0x1849 0x0150
end end
device pci 01.0 on device ref peg10 on
subsystemid 0x1849 0x0151 subsystemid 0x1849 0x0151
end end
device pci 02.0 on device ref igd on
subsystemid 0x1849 0x0152 subsystemid 0x1849 0x0152
end end
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
@ -39,53 +39,53 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on # USB 3.0 Controller device ref xhci on # USB 3.0 Controller
subsystemid 0x1849 0x1e31 subsystemid 0x1849 0x1e31
end end
device pci 16.0 on # Management Engine Interface 1 device ref mei1 on # Management Engine Interface 1
subsystemid 0x1849 0x1e3a subsystemid 0x1849 0x1e3a
end end
device pci 16.1 off # Management Engine Interface 2 device ref mei2 off # Management Engine Interface 2
end end
device pci 16.2 off # Management Engine IDE-R device ref me_ide_r off # Management Engine IDE-R
end end
device pci 16.3 on # Management Engine KT device ref me_kt on # Management Engine KT
subsystemid 0x1849 0x1e3d subsystemid 0x1849 0x1e3d
end end
device pci 19.0 off # Intel Gigabit Ethernet device ref gbe off # Intel Gigabit Ethernet
end end
device pci 1a.0 on # USB2 EHCI #2 device ref ehci2 on # USB2 EHCI #2
subsystemid 0x1849 0x1e2d subsystemid 0x1849 0x1e2d
end end
device pci 1b.0 on # High Definition Audio Audio controller device ref hda on # High Definition Audio Audio controller
subsystemid 0x1849 0x8892 subsystemid 0x1849 0x8892
end end
device pci 1c.0 on # PCIe Port #1 device ref pcie_rp1 on # PCIe Port #1
subsystemid 0x1849 0x1e10 subsystemid 0x1849 0x1e10
end end
device pci 1c.1 off # PCIe Port #2 device ref pcie_rp2 off # PCIe Port #2
end end
device pci 1c.2 off # PCIe Port #3 device ref pcie_rp3 off # PCIe Port #3
end end
device pci 1c.3 off # PCIe Port #4 device ref pcie_rp4 off # PCIe Port #4
end end
device pci 1c.4 on # PCIe Port #5, ASMedia ASM1062 SATA Controller device ref pcie_rp5 on # PCIe Port #5, ASMedia ASM1062 SATA Controller
subsystemid 0x1849 0x1e18 subsystemid 0x1849 0x1e18
end end
device pci 1c.5 on # PCIe Port #6, Realtek PCIe GbE Controller device ref pcie_rp6 on # PCIe Port #6, Realtek PCIe GbE Controller
subsystemid 0x1849 0x1e1a subsystemid 0x1849 0x1e1a
end end
device pci 1c.6 off # PCIe Port #7 device ref pcie_rp7 off # PCIe Port #7
end end
device pci 1c.7 off # PCIe Port #8 device ref pcie_rp8 off # PCIe Port #8
end end
device pci 1d.0 on # USB2 EHCI #1 device ref ehci1 on # USB2 EHCI #1
subsystemid 0x1849 0x1e26 subsystemid 0x1849 0x1e26
end end
device pci 1e.0 on # PCI bridge device ref pci_bridge on # PCI bridge
subsystemid 0x1849 0x244e subsystemid 0x1849 0x244e
end end
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
subsystemid 0x1849 0x1e49 subsystemid 0x1849 0x1e49
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
@ -130,15 +130,15 @@ chip northbridge/intel/sandybridge
device pnp 2e.17 on end # GPIOA device pnp 2e.17 on end # GPIOA
end end
end end
device pci 1f.2 on # SATA Controller 1 device ref sata1 on # SATA Controller 1
subsystemid 0x1849 0x1e02 subsystemid 0x1849 0x1e02
end end
device pci 1f.3 on # SMBus device ref smbus on # SMBus
subsystemid 0x1849 0x1e22 subsystemid 0x1849 0x1e22
end end
device pci 1f.5 off # SATA Controller 2 device ref sata2 off # SATA Controller 2
end end
device pci 1f.6 off # Thermal device ref thermal off # Thermal
end end
end end
end end

52
src/mainboard/asrock/h77pro4-m/devicetree.cb
View File

@ -2,11 +2,11 @@
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
device pci 00.0 on # Host bridge device ref host_bridge on # Host bridge
subsystemid 0x1849 0x0100 subsystemid 0x1849 0x0100
end end
device pci 01.0 on end # PEG - slot "PCIE1" device ref peg10 on end # PEG - slot "PCIE1"
device pci 02.0 on # iGPU device ref igd on # iGPU
subsystemid 0x1849 0x0102 subsystemid 0x1849 0x0102
end end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
@ -20,45 +20,45 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on # USB 3.0 Controller device ref xhci on # USB 3.0 Controller
subsystemid 0x1849 0x1e31 subsystemid 0x1849 0x1e31
end end
device pci 16.0 on # Management Engine Interface 1 device ref mei1 on # Management Engine Interface 1
subsystemid 0x1849 0x1e3a subsystemid 0x1849 0x1e3a
end end
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on # USB2 EHCI #2 device ref ehci2 on # USB2 EHCI #2
subsystemid 0x1849 0x1e2d subsystemid 0x1849 0x1e2d
end end
device pci 1b.0 on # High Definition Audio device ref hda on # High Definition Audio
subsystemid 0x1849 0x8892 subsystemid 0x1849 0x8892
end end
device pci 1c.0 on # PCIe Port #1 - slot "PCIE4", 4 lanes device ref pcie_rp1 on # PCIe Port #1 - slot "PCIE4", 4 lanes
subsystemid 0x1849 0x1e10 subsystemid 0x1849 0x1e10
end end
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on # PCIe Port #5 - slot "PCIE2", 1 lane device ref pcie_rp5 on # PCIe Port #5 - slot "PCIE2", 1 lane
subsystemid 0x1849 0x1e18 subsystemid 0x1849 0x1e18
end end
device pci 1c.5 on # PCIe Port #6 - RTL8111E GbE device ref pcie_rp6 on # PCIe Port #6 - RTL8111E GbE
subsystemid 0x1849 0x1e1a subsystemid 0x1849 0x1e1a
end end
device pci 1c.6 on # PCIe Port #7 - slot "PCIE3", 1 lane device ref pcie_rp7 on # PCIe Port #7 - slot "PCIE3", 1 lane
subsystemid 0x1849 0x1e16 subsystemid 0x1849 0x1e16
end end
device pci 1c.7 on # PCIe Port #8 - ASM1061 SATA Controller device ref pcie_rp8 on # PCIe Port #8 - ASM1061 SATA Controller
subsystemid 0x1849 0x1e1e subsystemid 0x1849 0x1e1e
end end
device pci 1d.0 on # USB2 EHCI #1 device ref ehci1 on # USB2 EHCI #1
subsystemid 0x1849 0x1e26 subsystemid 0x1849 0x1e26
end end
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
subsystemid 0x1849 0x1e4a subsystemid 0x1849 0x1e4a
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
@ -118,14 +118,14 @@ chip northbridge/intel/sandybridge
device pnp 2e.17 off end # GPIOA device pnp 2e.17 off end # GPIOA
end end
end end
device pci 1f.2 on # SATA (AHCI) device ref sata1 on # SATA (AHCI)
subsystemid 0x1849 0x1e02 subsystemid 0x1849 0x1e02
end end
device pci 1f.3 on # SMBus device ref smbus on # SMBus
subsystemid 0x1849 0x1e22 subsystemid 0x1849 0x1e22
end end
device pci 1f.5 off end # SATA (Legacy) device ref sata2 off end # SATA (Legacy)
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/asus/h61-series/devicetree.cb
View File

@ -2,39 +2,39 @@
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PEG device ref peg10 on end # PEG
device pci 02.0 on end # iGPU device ref igd on end # iGPU
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
register "sata_port_map" = "0x33" register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
device pci 16.0 on end # MEI #1 device ref mei1 on end # MEI #1
device pci 16.1 off end # MEI #2 device ref mei2 off end # MEI #2
device pci 16.2 off end # ME IDE-R device ref me_ide_r off end # ME IDE-R
device pci 16.3 off end # ME KT device ref me_kt off end # ME KT
device pci 19.0 off end # Intel GbE device ref gbe off end # Intel GbE
device pci 1a.0 on end # EHCI #2 device ref ehci2 on end # EHCI #2
device pci 1b.0 on end # HD Audio device ref hda on end # HD Audio
device pci 1c.0 off end # RP #1 device ref pcie_rp1 off end # RP #1
device pci 1c.1 off end # RP #2 device ref pcie_rp2 off end # RP #2
device pci 1c.2 off end # RP #3 device ref pcie_rp3 off end # RP #3
device pci 1c.3 off end # RP #4 device ref pcie_rp4 off end # RP #4
device pci 1c.4 off end # RP #5 device ref pcie_rp5 off end # RP #5
device pci 1c.5 off end # RP #6 device ref pcie_rp6 off end # RP #6
device pci 1c.6 off end # RP #7 device ref pcie_rp7 off end # RP #7
device pci 1c.7 off end # RP #8 device ref pcie_rp8 off end # RP #8
device pci 1d.0 on end # EHCI #1 device ref ehci1 on end # EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on end # LPC bridge device ref lpc on end # LPC bridge
device pci 1f.2 on end # SATA (AHCI) device ref sata1 on end # SATA (AHCI)
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA (Legacy) device ref sata2 off end # SATA (Legacy)
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/asus/maximus_iv_gene-z/devicetree.cb
View File

@ -4,9 +4,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1043 0x844d inherit subsystemid 0x1043 0x844d inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PCIe bridge for discrete graphics device ref peg10 on end # PCIe bridge for discrete graphics
device pci 02.0 on end # VGA controller device ref igd on end # VGA controller
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
register "gen1_dec" = "0x00000295" # Super I/O HWM register "gen1_dec" = "0x00000295" # Super I/O HWM
@ -14,28 +14,28 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on # Intel Gigabit Ethernet device ref gbe on # Intel Gigabit Ethernet
subsystemid 0x1043 0x849c subsystemid 0x1043 0x849c
end end
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on # HD audio controller device ref hda on # HD audio controller
subsystemid 0x1043 0x84dc subsystemid 0x1043 0x84dc
end end
device pci 1c.0 on end # PCIe port #1 device ref pcie_rp1 on end # PCIe port #1
device pci 1c.1 off end # PCIe port #2 device ref pcie_rp2 off end # PCIe port #2
device pci 1c.2 off end # PCIe port #3 device ref pcie_rp3 off end # PCIe port #3
device pci 1c.3 off end # PCIe port #4 device ref pcie_rp4 off end # PCIe port #4
device pci 1c.4 on end # PCIe port #5 device ref pcie_rp5 on end # PCIe port #5
device pci 1c.5 on end # PCIe port #6 device ref pcie_rp6 on end # PCIe port #6
device pci 1c.6 on end # PCIe port #7 device ref pcie_rp7 on end # PCIe port #7
device pci 1c.7 off end # PCIe port #8 device ref pcie_rp8 off end # PCIe port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 off end # Parallel device pnp 2e.1 off end # Parallel
@ -74,10 +74,10 @@ chip northbridge/intel/sandybridge
device pnp 2e.17 off end # GPIOA device pnp 2e.17 off end # GPIOA
end end
end end
device pci 1f.2 on end # SATA controller 1 device ref sata1 on end # SATA controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA controller 2 device ref sata2 off end # SATA controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

52
src/mainboard/asus/p8x7x-series/devicetree.cb
View File

@ -2,9 +2,9 @@
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PCIEX16_1 device ref peg10 on end # PCIEX16_1
device pci 02.0 on end # iGPU device ref igd on end # iGPU
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
register "sata_interface_speed_support" = "0x3" register "sata_interface_speed_support" = "0x3"
@ -15,32 +15,32 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # xHCI device ref xhci on end # xHCI
device pci 16.0 on end # MEI #1 device ref mei1 on end # MEI #1
device pci 16.1 off end # MEI #2 device ref mei2 off end # MEI #2
device pci 16.2 off end # ME IDE-R device ref me_ide_r off end # ME IDE-R
device pci 16.3 off end # ME KT device ref me_kt off end # ME KT
device pci 19.0 off end # Intel GbE device ref gbe off end # Intel GbE
device pci 1a.0 on end # EHCI #2 device ref ehci2 on end # EHCI #2
device pci 1b.0 on end # HD Audio device ref hda on end # HD Audio
device pci 1c.0 off end # RP #1 device ref pcie_rp1 off end # RP #1
device pci 1c.1 off end # RP #2 device ref pcie_rp2 off end # RP #2
device pci 1c.2 off end # RP #3 device ref pcie_rp3 off end # RP #3
device pci 1c.3 off end # RP #4 device ref pcie_rp4 off end # RP #4
device pci 1c.4 off end # RP #5 device ref pcie_rp5 off end # RP #5
device pci 1c.5 off end # RP #6 device ref pcie_rp6 off end # RP #6
device pci 1c.6 off end # RP #7 device ref pcie_rp7 off end # RP #7
device pci 1c.7 off end # RP #8 device ref pcie_rp8 off end # RP #8
device pci 1d.0 on end # EHCI #1 device ref ehci1 on end # EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
end end
device pci 1f.2 on end # SATA (AHCI) device ref sata1 on end # SATA (AHCI)
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA (Legacy) device ref sata2 off end # SATA (Legacy)
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

38
src/mainboard/biostar/th61-itx/devicetree.cb
View File

@ -4,9 +4,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1565 0x3108 inherit subsystemid 0x1565 0x3108 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PEG device ref peg10 on end # PEG
device pci 02.0 on end # iGPU device ref igd on end # iGPU
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x003c0a01" register "gen1_dec" = "0x003c0a01"
@ -15,18 +15,18 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
device pci 16.0 on end # MEI #1 device ref mei1 on end # MEI #1
device pci 1a.0 on end # EHCI #2 device ref ehci2 on end # EHCI #2
device pci 1b.0 on end # HD Audio device ref hda on end # HD Audio
device pci 1c.0 on end # RP #1: Realtek RTL8111F GbE NIC device ref pcie_rp1 on end # RP #1: Realtek RTL8111F GbE NIC
device pci 1c.1 on end # RP #2: ASMedia ASM1042 USB3 #1 device ref pcie_rp2 on end # RP #2: ASMedia ASM1042 USB3 #1
device pci 1c.2 on end # RP #3: ASMedia ASM1042 USB3 #2 device ref pcie_rp3 on end # RP #3: ASMedia ASM1042 USB3 #2
device pci 1c.3 off end # RP #4 device ref pcie_rp4 off end # RP #4
device pci 1c.4 off end # RP #5 device ref pcie_rp5 off end # RP #5
device pci 1c.5 off end # RP #6 device ref pcie_rp6 off end # RP #6
device pci 1d.0 on end # EHCI #1 device ref ehci1 on end # EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/ite/it8728f chip superio/ite/it8728f
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 off end # COM1 device pnp 2e.1 off end # COM1
@ -56,10 +56,10 @@ chip northbridge/intel/sandybridge
device pnp 2e.a off end # CIR device pnp 2e.a off end # CIR
end end
end end
device pci 1f.2 on end # SATA #1 device ref sata1 on end # SATA #1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA #2 (IDE mode) device ref sata2 off end # SATA #2 (IDE mode)
device pci 1f.6 on end # Thermal subsystem device ref thermal on end # Thermal subsystem
end end
end end
end end

54
src/mainboard/compulab/intense_pc/devicetree.cb
View File

@ -7,16 +7,16 @@ chip northbridge/intel/sandybridge # FIXME: check gfx
register "gpu_dp_d_hotplug" = "4" register "gpu_dp_d_hotplug" = "4"
device domain 0 on device domain 0 on
device pci 00.0 on # Host bridge device ref host_bridge on # Host bridge
subsystemid 0x8086 0x2010 subsystemid 0x8086 0x2010
end end
device pci 01.0 on # PCIe Bridge for discrete graphics device ref peg10 on # PCIe Bridge for discrete graphics
subsystemid 0x8086 0x2010 subsystemid 0x8086 0x2010
end end
device pci 01.1 on # PCIe Bridge for discrete graphics device ref peg11 on # PCIe Bridge for discrete graphics
subsystemid 0x8086 0x2010 subsystemid 0x8086 0x2010
end end
device pci 02.0 on # Internal graphics VGA controller device ref igd on # Internal graphics VGA controller
subsystemid 0x8086 0x2211 subsystemid 0x8086 0x2211
end end
@ -47,29 +47,29 @@ chip northbridge/intel/sandybridge # FIXME: check gfx
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1 device ref mei1 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 device ref pcie_rp3 on end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on end # LPC bridge device ref lpc on end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

54
src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
View File

@ -6,12 +6,12 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # Host bridge Host bridge device ref host_bridge on end # Host bridge Host bridge
device pci 01.0 on # PEG1 (blue slot1) device ref peg10 on # PEG1 (blue slot1)
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "SLOT1" "SlotDataBusWidth16X" smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "SLOT1" "SlotDataBusWidth16X"
end end
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
device pci 06.0 off end # PEG2 device ref peg60 off end # PEG2
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "gpe0_en" = "0x00002a46" register "gpe0_en" = "0x00002a46"
@ -29,25 +29,25 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x08040201" register "xhci_overcurrent_mapping" = "0x08040201"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1 device ref mei1 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio controller device ref hda on end # High Definition Audio controller
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
@ -77,10 +77,10 @@ chip northbridge/intel/sandybridge
device pnp 2e.11 off end # PP device pnp 2e.11 off end # PP
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
View File

@ -1,11 +1,11 @@
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit
device pci 00.0 on # Host bridge device ref host_bridge on # Host bridge
subsystemid 0x1458 0x5000 subsystemid 0x1458 0x5000
end end
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on # Integrated VGA controller device ref igd on # Integrated VGA controller
subsystemid 0x1458 0xd000 subsystemid 0x1458 0xd000
end end
@ -20,37 +20,37 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0xf" register "superspeed_capable_ports" = "0xf"
device pci 14.0 on # USB 3.0 Controller device ref xhci on # USB 3.0 Controller
subsystemid 0x1458 0x5007 subsystemid 0x1458 0x5007
end end
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on # USB2 EHCI #2 device ref ehci2 on # USB2 EHCI #2
subsystemid 0x1458 0x5006 subsystemid 0x1458 0x5006
end end
device pci 1b.0 on # High Definition Audio device ref hda on # High Definition Audio
subsystemid 0x1458 0xa002 subsystemid 0x1458 0xa002
end end
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on # PCIe Port #5 device ref pcie_rp5 on # PCIe Port #5
device pci 00.0 on # PCI 10ec:8168 device pci 00.0 on # PCI 10ec:8168
subsystemid 0x1458 0xe000 subsystemid 0x1458 0xe000
end end
end end
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on # USB2 EHCI #1 device ref ehci1 on # USB2 EHCI #1
subsystemid 0x1458 0x5006 subsystemid 0x1458 0x5006
end end
device pci 1e.0 on end # PCI bridge device ref pci_bridge on end # PCI bridge
device pci 1f.0 on # ISA/LPC bridge device ref lpc on # ISA/LPC bridge
subsystemid 0x1458 0x5001 subsystemid 0x1458 0x5001
chip superio/ite/it8728f chip superio/ite/it8728f
device pnp 2e.0 off end # FDC device pnp 2e.0 off end # FDC
@ -88,14 +88,14 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on # SATA Controller 1 device ref sata1 on # SATA Controller 1
subsystemid 0x1458 0xb005 subsystemid 0x1458 0xb005
end end
device pci 1f.3 on # SMBus device ref smbus on # SMBus
subsystemid 0x1458 0x5001 subsystemid 0x1458 0x5001
end end
device pci 1f.4 off end device pci 1f.4 off end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
end end
end end
end end

26
src/mainboard/gigabyte/ga-h61m-series/devicetree.cb
View File

@ -4,9 +4,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PEG device ref peg10 on end # PEG
device pci 02.0 on end # iGPU device ref igd on end # iGPU
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x003c0a01" register "gen1_dec" = "0x003c0a01"
@ -15,17 +15,17 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
device pci 16.0 on end # MEI #1 device ref mei1 on end # MEI #1
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio device ref hda on end # HD Audio
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on end # LPC bridge device ref lpc on end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

52
src/mainboard/google/butterfly/devicetree.cb
View File

@ -21,9 +21,9 @@ chip northbridge/intel/sandybridge
register "max_mem_clock_mhz" = "666" # DDR3-1333 register "max_mem_clock_mhz" = "666" # DDR3-1333
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -48,27 +48,27 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions # Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 (mini PCIe Slot - WLAN & Serial debug) device ref pcie_rp1 on end # PCIe Port #1 (mini PCIe Slot - WLAN & Serial debug)
device pci 1c.1 on end # PCIe Port #2 (ETH0) device ref pcie_rp2 on end # PCIe Port #2 (ETH0)
device pci 1c.2 on end # PCIe Port #3 (Card Reader) device ref pcie_rp3 on end # PCIe Port #3 (Card Reader)
#force ASPM for PCIe bridge to Card Reader #force ASPM for PCIe bridge to Card Reader
register "pcie_aspm[2]" = "0x3" register "pcie_aspm[2]" = "0x3"
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on #LPC bridge device ref lpc on #LPC bridge
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
@ -78,10 +78,10 @@ chip northbridge/intel/sandybridge
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

48
src/mainboard/google/link/devicetree.cb
View File

@ -21,8 +21,8 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1ae0 0xc000 inherit subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -46,24 +46,24 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions # Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 off end # PCIe Port #1 (WLAN remapped) device ref pcie_rp1 off end # PCIe Port #1 (WLAN remapped)
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 (WLAN actual) device ref pcie_rp3 on end # PCIe Port #3 (WLAN actual)
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
@ -75,10 +75,10 @@ chip northbridge/intel/sandybridge
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

48
src/mainboard/google/parrot/devicetree.cb
View File

@ -20,8 +20,8 @@ chip northbridge/intel/sandybridge
register "max_mem_clock_mhz" = "666" register "max_mem_clock_mhz" = "666"
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -44,34 +44,34 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions # Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 (WLAN) device ref pcie_rp2 on end # PCIe Port #2 (WLAN)
device pci 1c.2 on end # PCIe Port #3 (ETH0) device ref pcie_rp3 on end # PCIe Port #3 (ETH0)
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip ec/compal/ene932 chip ec/compal/ene932
# 60/64 KBC # 60/64 KBC
device pnp ff.1 on # dummy address device pnp ff.1 on # dummy address
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/google/stout/devicetree.cb
View File

@ -27,8 +27,8 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1ae0 0xc000 inherit subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -55,26 +55,26 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions # Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 (AUO4, BlueTooth) device ref ehci2 on end # USB2 EHCI #2 (AUO4, BlueTooth)
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 (WLAN) device ref pcie_rp2 on end # PCIe Port #2 (WLAN)
device pci 1c.2 on end # PCIe Port #3 (Card Reader) device ref pcie_rp3 on end # PCIe Port #3 (Card Reader)
register "pcie_aspm[2]" = "0x3" register "pcie_aspm[2]" = "0x3"
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 on end # PCIe Port #6 (LAN) device ref pcie_rp6 on end # PCIe Port #6 (LAN)
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 (Camera, WLAN, WWAN) device ref ehci1 on end # USB2 EHCI #1 (Camera, WLAN, WWAN)
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
@ -84,10 +84,10 @@ chip northbridge/intel/sandybridge
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 (HDD/SSD) device ref sata1 on end # SATA Controller 1 (HDD/SSD)
device pci 1f.3 on end # SMBus Controller device ref smbus on end # SMBus Controller
device pci 1f.5 off end # SATA Controller 2 (MSATA) device ref sata2 off end # SATA Controller 2 (MSATA)
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
View File

@ -9,9 +9,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x103c 0x1495 inherit subsystemid 0x103c 0x1495 inherit
device pci 00.0 on end # Host bridge Host bridge device ref host_bridge on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "0" register "docking_supported" = "0"
@ -24,24 +24,24 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x0" register "spi_uvscc" = "0x0"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 on end # Management Engine KT device ref me_kt on end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7 device ref pcie_rp7 on end # PCIe Port #7
device pci 1c.7 on end # PCIe Port #8 device ref pcie_rp8 on end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 on end # PCI bridge device ref pci_bridge on end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip superio/common chip superio/common
device pnp 2e.ff on # passes SIO base addr to SSDT gen device pnp 2e.ff on # passes SIO base addr to SSDT gen
chip superio/nuvoton/npcd378 chip superio/nuvoton/npcd378
@ -146,10 +146,10 @@ chip northbridge/intel/sandybridge
device pnp 4e.0 on end # TPM module device pnp 4e.0 on end # TPM module
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

30
src/mainboard/hp/snb_ivb_laptops/devicetree.cb
View File

@ -18,7 +18,7 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "pcie_port_coalesce" = "true" register "pcie_port_coalesce" = "true"
@ -26,24 +26,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0" register "spi_lvscc" = "0"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller device ref hda on end # HD Audio controller
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

54
src/mainboard/hp/z220_series/devicetree.cb
View File

@ -9,10 +9,10 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x103c 0x1791 inherit subsystemid 0x103c 0x1791 inherit
device pci 00.0 on end # Host bridge Host bridge device ref host_bridge on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
device pci 06.0 off end # Extra x4 port on north bridge device ref peg60 off end # Extra x4 port on north bridge
chip southbridge/intel/bd82x6x # Intel Series 7 PCH chip southbridge/intel/bd82x6x # Intel Series 7 PCH
register "docking_supported" = "0" register "docking_supported" = "0"
@ -27,25 +27,25 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x0000000f" register "xhci_overcurrent_mapping" = "0x0000000f"
device pci 14.0 on end # xHCI device ref xhci on end # xHCI
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 on end # Management Engine KT device ref me_kt on end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 on end # PCI bridge device ref pci_bridge on end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip superio/common chip superio/common
device pnp 2e.ff on # passes SIO base addr to SSDT gen device pnp 2e.ff on # passes SIO base addr to SSDT gen
chip superio/nuvoton/npcd378 chip superio/nuvoton/npcd378
@ -150,10 +150,10 @@ chip northbridge/intel/sandybridge
device pnp 4e.0 on end # TPM module device pnp 4e.0 on end # TPM module
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

52
src/mainboard/intel/dcp847ske/devicetree.cb
View File

@ -12,9 +12,9 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "0x06" register "gpu_dp_b_hotplug" = "0x06"
device domain 0 on device domain 0 on
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "sata_port_map" = "0x1" register "sata_port_map" = "0x1"
@ -23,25 +23,25 @@ chip northbridge/intel/sandybridge
register "gen1_dec" = "0x00fc0a01" # SuperIO @0xa00-0xaff register "gen1_dec" = "0x00fc0a01" # SuperIO @0xa00-0xaff
device pci 14.0 off end # USB xHCI device ref xhci off end # USB xHCI
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 off end # USB2 EHCI #2 device ref ehci2 off end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller device ref hda on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 (unused) device ref pcie_rp1 on end # PCIe Port #1 (unused)
device pci 1c.1 on end # PCIe Port #2 (full-length mPCIe/mSATA) device ref pcie_rp2 on end # PCIe Port #2 (full-length mPCIe/mSATA)
device pci 1c.2 on end # PCIe Port #3 (half-length mPCIe) device ref pcie_rp3 on end # PCIe Port #3 (half-length mPCIe)
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 4e.0 off end # Floppy device pnp 4e.0 off end # Floppy
device pnp 4e.1 off end # Parallel port device pnp 4e.1 off end # Parallel port
@ -82,10 +82,10 @@ chip northbridge/intel/sandybridge
device pnp 4e.17 off end # GPIOA device pnp 4e.17 off end # GPIOA
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

48
src/mainboard/intel/emeraldlake2/devicetree.cb
View File

@ -20,8 +20,8 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -41,28 +41,28 @@ chip northbridge/intel/sandybridge
# SuperIO range is 0x700-0x73f # SuperIO range is 0x700-0x73f
register "gen3_dec" = "0x003c0701" register "gen3_dec" = "0x003c0701"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 (WLAN) device ref pcie_rp1 on end # PCIe Port #1 (WLAN)
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 (Debug) device ref pcie_rp3 on end # PCIe Port #3 (Debug)
device pci 1c.3 on end # PCIe Port #4 (LAN) device ref pcie_rp4 on end # PCIe Port #4 (LAN)
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on end # LPC bridge device ref lpc on end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

52
src/mainboard/kontron/ktqm77/devicetree.cb
View File

@ -10,9 +10,9 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 on end # PCIe Bridge x16 device ref peg10 on end # PCIe Bridge x16
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# Enable all SATA ports 0-5 # Enable all SATA ports 0-5
@ -32,29 +32,29 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0x0f" register "xhci_switchable_ports" = "0x0f"
register "superspeed_capable_ports" = "0x0f" register "superspeed_capable_ports" = "0x0f"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
# Disabling 1c.0 might break IRQ settings as it enables port coalescing # Disabling 1c.0 might break IRQ settings as it enables port coalescing
# There are two mini PCIe x1 sockets, so one PCIe port is unrouted # There are two mini PCIe x1 sockets, so one PCIe port is unrouted
device pci 1c.0 on end # PCIe Port #1 mini PCIe x1? device ref pcie_rp1 on end # PCIe Port #1 mini PCIe x1?
device pci 1c.1 on end # PCIe Port #2 mini PCIe x1? device ref pcie_rp2 on end # PCIe Port #2 mini PCIe x1?
device pci 1c.2 on end # PCIe Port #3 second Ethernet NIC device ref pcie_rp3 on end # PCIe Port #3 second Ethernet NIC
device pci 1c.3 on end # PCIe Port #4 third Ethernet NIC device ref pcie_rp4 on end # PCIe Port #4 third Ethernet NIC
device pci 1c.4 on end # PCIe Port #5 first Ethernet PHY device ref pcie_rp5 on end # PCIe Port #5 first Ethernet PHY
device pci 1c.5 on end # PCIe Port #6 FireWire device ref pcie_rp6 on end # PCIe Port #6 FireWire
device pci 1c.6 on end # PCIe Port #7 PCIe x1 device ref pcie_rp7 on end # PCIe Port #7 PCIe x1
device pci 1c.7 on end # PCIe Port #8 mini PCIe x1? device ref pcie_rp8 on end # PCIe Port #8 mini PCIe x1?
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on #LPC bridge device ref lpc on #LPC bridge
chip superio/winbond/w83627dhg chip superio/winbond/w83627dhg
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
end end
@ -134,10 +134,10 @@ chip northbridge/intel/sandybridge
end #ec/kontron/it8516e end #ec/kontron/it8516e
# TODO: TPM on 4e # TODO: TPM on 4e
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/lenovo/l520/devicetree.cb
View File

@ -15,9 +15,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21dd inherit subsystemid 0x17aa 0x21dd inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "1" register "docking_supported" = "1"
@ -35,24 +35,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0" register "spi_uvscc" = "0"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 device ref pcie_rp3 on end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 device ref pcie_rp4 on end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 on end # PCIe Port #6 device ref pcie_rp6 on end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01" register "dock_event_enable" = "0x01"
@ -89,8 +89,8 @@ chip northbridge/intel/sandybridge
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBus device ref smbus on # SMBus
chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
device i2c 54 on end device i2c 54 on end
device i2c 55 on end device i2c 55 on end
@ -102,8 +102,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

52
src/mainboard/lenovo/s230u/devicetree.cb
View File

@ -15,9 +15,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x2205 inherit subsystemid 0x17aa 0x2205 inherit
device pci 00.0 on end # Host bridge Host bridge device ref host_bridge on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "1" register "docking_supported" = "1"
@ -38,31 +38,31 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 device ref pcie_rp4 on end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBus device ref smbus on # SMBus
chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
device i2c 54 on end device i2c 54 on end
device i2c 55 on end device i2c 55 on end
@ -74,8 +74,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/lenovo/t420/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21ce inherit subsystemid 0x17aa 0x21ce inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Integrated Graphics Controller device ref igd on end # Integrated Graphics Controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -49,32 +49,32 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB Enhanced Host Controller #2 device ref ehci2 on end # USB Enhanced Host Controller #2
device pci 1b.0 on end # High Definition Audio Controller device ref hda on end # High Definition Audio Controller
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on device ref pcie_rp4 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #4 ExpressCard end # PCIe Port #4 ExpressCard
device pci 1c.4 on device ref pcie_rp5 on
chip drivers/ricoh/rce822 chip drivers/ricoh/rce822
register "sdwppol" = "1" register "sdwppol" = "1"
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
device pci 00.0 on end device pci 00.0 on end
end end
end # PCIe Port #5 (Ricoh SD & FW) end # PCIe Port #5 (Ricoh SD & FW)
device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB Enhanced Host Controller #1 device ref ehci1 on end # USB Enhanced Host Controller #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -136,8 +136,8 @@ chip northbridge/intel/sandybridge
register "has_thinker1" = "1" register "has_thinker1" = "1"
end end
end # LPC Controller end # LPC Controller
device pci 1f.2 on end # 6 port SATA AHCI Controller device ref sata1 on end # 6 port SATA AHCI Controller
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -150,8 +150,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus Controller end # SMBus Controller
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/lenovo/t420s/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21d2 inherit subsystemid 0x17aa 0x21d2 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M]
device pci 02.0 on device ref igd on
subsystemid 0x17aa 0x21d3 subsystemid 0x17aa 0x21d3
end # Integrated Graphics Controller end # Integrated Graphics Controller
@ -51,28 +51,28 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on device ref gbe on
subsystemid 0x17aa 0x21ce subsystemid 0x17aa 0x21ce
end # Intel Gigabit Ethernet end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB Enhanced Host Controller #2 device ref ehci2 on end # USB Enhanced Host Controller #2
device pci 1b.0 on end # High Definition Audio Controller device ref hda on end # High Definition Audio Controller
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on device ref pcie_rp4 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #4 ExpressCard end # PCIe Port #4 ExpressCard
device pci 1c.4 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller device ref pcie_rp5 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller
device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB Enhanced Host Controller #1 device ref ehci1 on end # USB Enhanced Host Controller #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -134,8 +134,8 @@ chip northbridge/intel/sandybridge
register "has_thinker1" = "1" register "has_thinker1" = "1"
end end
end # LPC Controller end # LPC Controller
device pci 1f.2 on end # 6 port SATA AHCI Controller device ref sata1 on end # 6 port SATA AHCI Controller
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -148,8 +148,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus Controller end # SMBus Controller
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

54
src/mainboard/lenovo/t430/devicetree.cb
View File

@ -36,33 +36,33 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on # PCIe Port #1 device ref pcie_rp1 on # PCIe Port #1
chip drivers/ricoh/rce822 # Ricoh cardreader chip drivers/ricoh/rce822 # Ricoh cardreader
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
register "sdwppol" = "1" register "sdwppol" = "1"
device pci 00.0 on end # Ricoh SD card reader device pci 00.0 on end # Ricoh SD card reader
end end
end end
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 on # PCIe Port #3 device ref pcie_rp3 on # PCIe Port #3
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end end
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01" register "dock_event_enable" = "0x01"
@ -125,8 +125,8 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBus device ref smbus on # SMBus
chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
device i2c 54 on end device i2c 54 on end
device i2c 55 on end device i2c 55 on end
@ -138,12 +138,12 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
device pci 00.0 on end # Host bridge Host bridge device ref host_bridge on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
device pci 04.0 off end # Signal processing controller device ref dev4 off end # Signal processing controller
end end
end end

52
src/mainboard/lenovo/t430s/devicetree.cb
View File

@ -17,9 +17,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21fb inherit subsystemid 0x17aa 0x21fb inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Integrated Graphics Controller device ref igd on end # Integrated Graphics Controller
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# GPI routing # GPI routing
@ -52,29 +52,29 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on device ref gbe on
subsystemid 0x17aa 0x21f3 subsystemid 0x17aa 0x21f3
end # Intel Gigabit Ethernet end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB Enhanced Host Controller #2 device ref ehci2 on end # USB Enhanced Host Controller #2
device pci 1b.0 on end # High Definition Audio Controller device ref hda on end # High Definition Audio Controller
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN
device pci 1c.2 on device ref pcie_rp3 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #3 ExpressCard end # PCIe Port #3 ExpressCard
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB Enhanced Host Controller #1 device ref ehci1 on end # USB Enhanced Host Controller #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on device ref lpc on
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -118,8 +118,8 @@ chip northbridge/intel/sandybridge
register "evente_enable" = "0x0d" register "evente_enable" = "0x0d"
end end
end # LPC Controller end # LPC Controller
device pci 1f.2 on end # 6 port SATA AHCI Controller device ref sata1 on end # 6 port SATA AHCI Controller
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -132,8 +132,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus Controller end # SMBus Controller
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

45
src/mainboard/lenovo/t520/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21cf inherit subsystemid 0x17aa 0x21cf inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M]
device pci 02.0 on device ref igd on
subsystemid 0x17aa 0x21d1 subsystemid 0x17aa 0x21d1
end # vga controller end # vga controller
@ -50,28 +50,27 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end device ref mei2 off end
device pci 16.2 off end device ref me_ide_r off end
device pci 16.3 off end device ref me_kt off end
device pci 19.0 on # Intel Gigabit Ethernet device ref gbe on # Intel Gigabit Ethernet
subsystemid 0x17aa 0x21ce subsystemid 0x17aa 0x21ce
end end
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 off end # PCIe Port #1 device ref pcie_rp1 off end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on device ref pcie_rp4 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #4 Express Card end # PCIe Port #4 Express Card
device pci 1c.4 on end # PCIe Port #5 MMC/SDXC + IEEE1394 device ref pcie_rp5 on end # PCIe Port #5 MMC/SDXC + IEEE1394
device pci 1c.5 off end # PCIe Port #6 Intel Ethernet PHY device ref pcie_rp6 off end # PCIe Port #6 Intel Ethernet PHY
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI-2-PCI bridge device ref lpc on #LPC bridge
device pci 1f.0 on #LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -131,8 +130,8 @@ chip northbridge/intel/sandybridge
register "has_thinker1" = "1" register "has_thinker1" = "1"
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBUS controller device ref smbus on # SMBUS controller
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end

52
src/mainboard/lenovo/t530/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21f6 inherit subsystemid 0x17aa 0x21f6 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PCIe bridge for discrete graphics device ref peg10 on end # PCIe bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# GPI routing # GPI routing
@ -53,29 +53,29 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on # Intel Gigabit Ethernet device ref gbe on # Intel Gigabit Ethernet
subsystemid 0x17aa 0x21f3 subsystemid 0x17aa 0x21f3
end end
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 on # PCIe Port #3 device ref pcie_rp3 on # PCIe Port #3
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end end
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # PCI-LPC bridge device ref lpc on # PCI-LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -137,8 +137,8 @@ chip northbridge/intel/sandybridge
register "has_thinker1" = "1" register "has_thinker1" = "1"
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBus device ref smbus on # SMBus
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -151,8 +151,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

54
src/mainboard/lenovo/x131e/devicetree.cb
View File

@ -17,10 +17,10 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21fe inherit subsystemid 0x17aa 0x21fe inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device ref igd on end # Internal graphics VGA controller
device pci 04.0 off end # Signal processing controller device ref dev4 off end # Signal processing controller
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
# GPI routing # GPI routing
@ -48,25 +48,25 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device ref hda on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 (WLAN card) device ref pcie_rp2 on end # PCIe Port #2 (WLAN card)
device pci 1c.2 on end # PCIe Port #3 (Card Reader) device ref pcie_rp3 on end # PCIe Port #3 (Card Reader)
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 on end # PCIe Port #6 (Ethernet controller) device ref pcie_rp6 on end # PCIe Port #6 (Ethernet controller)
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device ref lpc on # LPC bridge PCI-LPC bridge
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
@ -108,8 +108,8 @@ chip northbridge/intel/sandybridge
register "eventf_enable" = "0xff" register "eventf_enable" = "0xff"
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on # SMBus device ref smbus on # SMBus
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -122,8 +122,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

52
src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb
View File

@ -15,9 +15,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21f9 inherit subsystemid 0x17aa 0x21f9 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -50,31 +50,31 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on device ref pcie_rp1 on
chip drivers/ricoh/rce822 chip drivers/ricoh/rce822
register "sdwppol" = "0" register "sdwppol" = "0"
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
device pci 00.0 on end device pci 00.0 on end
end end
end # PCIe Port #1 end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on #LPC bridge device ref lpc on #LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -121,8 +121,8 @@ chip northbridge/intel/sandybridge
register "wwan_gpio_lvl" = "0" register "wwan_gpio_lvl" = "0"
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -135,8 +135,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/lenovo/x220/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21db inherit subsystemid 0x17aa 0x21db inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -48,34 +48,34 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on device ref gbe on
subsystemid 0x17aa 0x21ce subsystemid 0x17aa 0x21ce
end # Intel Gigabit Ethernet end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 (wlan) device ref pcie_rp2 on end # PCIe Port #2 (wlan)
device pci 1c.2 on end # PCIe Port #3 device ref pcie_rp3 on end # PCIe Port #3
device pci 1c.3 on device ref pcie_rp4 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #4 end # PCIe Port #4
device pci 1c.4 on device ref pcie_rp5 on
chip drivers/ricoh/rce822 chip drivers/ricoh/rce822
register "sdwppol" = "1" register "sdwppol" = "1"
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
device pci 00.0 on end device pci 00.0 on end
end end
end # PCIe Port #5 (SD) end # PCIe Port #5 (SD)
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7 device ref pcie_rp7 on end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on #LPC bridge device ref lpc on #LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -127,8 +127,8 @@ chip northbridge/intel/sandybridge
register "wwan_gpio_lvl" = "0" register "wwan_gpio_lvl" = "0"
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -141,8 +141,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

52
src/mainboard/lenovo/x230/devicetree.cb
View File

@ -18,9 +18,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21fa inherit subsystemid 0x17aa 0x21fa inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device ref peg10 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -51,33 +51,33 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on device ref gbe on
subsystemid 0x17aa 0x21f3 subsystemid 0x17aa 0x21f3
end # Intel Gigabit Ethernet end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on device ref pcie_rp1 on
chip drivers/ricoh/rce822 chip drivers/ricoh/rce822
register "sdwppol" = "1" register "sdwppol" = "1"
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
device pci 00.0 on end device pci 00.0 on end
end end
end # PCIe Port #1 end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on #LPC bridge device ref lpc on #LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
@ -130,8 +130,8 @@ chip northbridge/intel/sandybridge
register "wwan_gpio_lvl" = "0" register "wwan_gpio_lvl" = "0"
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
device i2c 54 on end device i2c 54 on end
@ -144,8 +144,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end device i2c 5f on end
end end
end # SMBus end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/msi/ms7707/devicetree.cb
View File

@ -2,9 +2,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1462 0x7707 inherit subsystemid 0x1462 0x7707 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device ref peg10 on end # PCIe Bridge for discrete graphics
device pci 02.0 off end # Internal graphics device ref igd off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "0" register "docking_supported" = "0"
@ -17,24 +17,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "gpe0_en" = "0x28000040" register "gpe0_en" = "0x28000040"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller device ref hda on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7 device ref pcie_rp7 on end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/fintek/f71808a chip superio/fintek/f71808a
register "multi_function_register_0" = "0x00" # 0x28 register "multi_function_register_0" = "0x00" # 0x28
register "multi_function_register_1" = "0xc0" # 0x29 register "multi_function_register_1" = "0xc0" # 0x29
@ -94,10 +94,10 @@ chip northbridge/intel/sandybridge
end end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/roda/rv11/variants/rv11/devicetree.cb
View File

@ -25,8 +25,8 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# Enable both SATA ports 0, 1 # Enable both SATA ports 0, 1
@ -52,40 +52,40 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on # High Definition Audio device ref hda on # High Definition Audio
subsystemid 0x1a86 0x4352 subsystemid 0x1a86 0x4352
end end
# Disabling 1c.0 might break IRQ settings as it enables port coalescing # Disabling 1c.0 might break IRQ settings as it enables port coalescing
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 device ref pcie_rp4 on end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7 device ref pcie_rp7 on end # PCIe Port #7
device pci 1c.7 on end # PCIe Port #8 device ref pcie_rp8 on end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip ec/roda/it8518 chip ec/roda/it8518
# 60h/64h KBC # 60h/64h KBC
device pnp ff.0 on # dummy address device pnp ff.0 on # dummy address
end end
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

50
src/mainboard/roda/rv11/variants/rw11/devicetree.cb
View File

@ -25,8 +25,8 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# LPC i/o generic decodes # LPC i/o generic decodes
@ -57,30 +57,30 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller device ref xhci on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device ref gbe on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on # High Definition Audio device ref hda on # High Definition Audio
subsystemid 0x1a86 0x4352 subsystemid 0x1a86 0x4352
end end
# Disabling 1c.0 might break IRQ settings as it enables port coalescing # Disabling 1c.0 might break IRQ settings as it enables port coalescing
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device ref pcie_rp2 on end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 device ref pcie_rp3 on end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 device ref pcie_rp4 on end # PCIe Port #4
device pci 1c.4 on end # PCIe Port #5 device ref pcie_rp5 on end # PCIe Port #5
device pci 1c.5 on end # PCIe Port #6 device ref pcie_rp6 on end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7 device ref pcie_rp7 on end # PCIe Port #7
device pci 1c.7 on end # PCIe Port #8 device ref pcie_rp8 on end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip ec/roda/it8518 chip ec/roda/it8518
register "cpuhot_limit" = "100" register "cpuhot_limit" = "100"
# 60h/64h KBC # 60h/64h KBC
@ -144,10 +144,10 @@ chip northbridge/intel/sandybridge
device pnp 2e.c off end # CIR device pnp 2e.c off end # CIR
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

48
src/mainboard/samsung/lumpy/devicetree.cb
View File

@ -21,8 +21,8 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1ae0 0xc000 inherit subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -40,24 +40,24 @@ chip northbridge/intel/sandybridge
register "gen2_dec" = "0x003c0b01" register "gen2_dec" = "0x003c0b01"
register "gen3_dec" = "0x00fc1601" register "gen3_dec" = "0x00fc1601"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 (WLAN) device ref pcie_rp1 on end # PCIe Port #1 (WLAN)
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 (LAN) device ref pcie_rp4 on end # PCIe Port #4 (LAN)
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/smsc/mec1308 chip superio/smsc/mec1308
device pnp 2e.1 on # PM1 device pnp 2e.1 on # PM1
io 0x60 = 0xb00 io 0x60 = 0xb00
@ -83,10 +83,10 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

48
src/mainboard/samsung/stumpy/devicetree.cb
View File

@ -20,8 +20,8 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x1ae0 0xc000 inherit subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device ref host_bridge on end # host bridge
device pci 02.0 on end # vga controller device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -37,24 +37,24 @@ chip northbridge/intel/sandybridge
# SuperIO range is 0x700-0x73f # SuperIO range is 0x700-0x73f
register "gen2_dec" = "0x003c0701" register "gen2_dec" = "0x003c0701"
device pci 16.0 on end # Management Engine Interface 1 device ref mei1 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device ref hda on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 (WLAN) device ref pcie_rp1 on end # PCIe Port #1 (WLAN)
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 (Debug) device ref pcie_rp3 on end # PCIe Port #3 (Debug)
device pci 1c.3 on end # PCIe Port #4 (LAN) device ref pcie_rp4 on end # PCIe Port #4 (LAN)
device pci 1c.4 off end # PCIe Port #5 device ref pcie_rp5 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/ite/it8772f chip superio/ite/it8772f
# Enable GPIO10 as USBPWRON12# # Enable GPIO10 as USBPWRON12#
# Enable GPIO12 as USBPWRON13# # Enable GPIO12 as USBPWRON13#
@ -102,10 +102,10 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 on end # Thermal device ref thermal on end # Thermal
end end
end end
end end

50
src/mainboard/sapphire/pureplatinumh61/devicetree.cb
View File

@ -17,38 +17,38 @@ chip northbridge/intel/sandybridge
{0x9f, READ_NO_ADDR}, {0x9f, READ_NO_ADDR},
{0xad, WRITE_NO_ADDR}, {0xad, WRITE_NO_ADDR},
{0x04, WRITE_NO_ADDR}}" {0x04, WRITE_NO_ADDR}}"
device pci 16.0 on # Management Engine Interface 1 device ref mei1 on # Management Engine Interface 1
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet device ref gbe off end # Intel Gigabit Ethernet
device pci 1a.0 on # USB2 EHCI #2 device ref ehci2 on # USB2 EHCI #2
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1b.0 on # HD Audio Controller device ref hda on # HD Audio Controller
subsystemid 0x8086 0x1c20 subsystemid 0x8086 0x1c20
end end
device pci 1c.0 on # PCIe Port #1 device ref pcie_rp1 on # PCIe Port #1
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on # PCIe Port #5 device ref pcie_rp5 on # PCIe Port #5
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1c.5 on # PCIe Port #6 device ref pcie_rp6 on # PCIe Port #6
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1c.6 off end # PCIe Port #7 device ref pcie_rp7 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on # USB2 EHCI #1 device ref ehci1 on # USB2 EHCI #1
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1e.0 off end # PCI bridge device ref pci_bridge off end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
chip superio/fintek/f71808a chip superio/fintek/f71808a
register "multi_function_register_0" = "0x00" register "multi_function_register_0" = "0x00"
@ -91,22 +91,22 @@ chip northbridge/intel/sandybridge
end end
end end
end end
device pci 1f.2 on # SATA Controller 1 device ref sata1 on # SATA Controller 1
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1f.3 on # SMBus device ref smbus on # SMBus
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
device pci 00.0 on # Host bridge device ref host_bridge on # Host bridge
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 01.0 on # PCIe Bridge for discrete graphics device ref peg10 on # PCIe Bridge for discrete graphics
subsystemid 0x174b 0x1007 subsystemid 0x174b 0x1007
end end
device pci 02.0 on # Internal graphics VGA controller device ref igd on # Internal graphics VGA controller
subsystemid 0x8086 0x2010 subsystemid 0x8086 0x2010
end end
end end

56
src/mainboard/supermicro/x9sae/devicetree.cb
View File

@ -10,11 +10,11 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x15d9 0x0644 inherit subsystemid 0x15d9 0x0644 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # CPU1 SLOT6 (x8 or x16) device ref peg10 on end # CPU1 SLOT6 (x8 or x16)
device pci 01.1 on end # CPU1 SLOT4 (electrical x8 in x16 if present) device ref peg11 on end # CPU1 SLOT4 (electrical x8 in x16 if present)
device pci 02.0 on end # iGPU device ref igd on end # iGPU
device pci 06.0 on end # CPU1 SLOT7 (electrical x4 in x8) device ref peg60 on end # CPU1 SLOT7 (electrical x4 in x8)
chip southbridge/intel/bd82x6x chip southbridge/intel/bd82x6x
register "gen1_dec" = "0x00fc0a01" # NCT6776 SuperIO (0x0a00-0aff) register "gen1_dec" = "0x00fc0a01" # NCT6776 SuperIO (0x0a00-0aff)
@ -26,29 +26,29 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # xHCI device ref xhci on end # xHCI
device pci 16.0 on end # MEI #1 device ref mei1 on end # MEI #1
device pci 16.1 off end # MEI #2 device ref mei2 off end # MEI #2
device pci 16.2 off end # ME IDE-R device ref me_ide_r off end # ME IDE-R
device pci 16.3 off end # ME KT device ref me_kt off end # ME KT
device pci 19.0 on end # Intel GbE LAN1 device ref gbe on end # Intel GbE LAN1
device pci 1a.0 on end # EHCI #2 device ref ehci2 on end # EHCI #2
device pci 1b.0 on end # HD Audio device ref hda on end # HD Audio
device pci 1c.0 on end # RP #1 PCH SLOT2 device ref pcie_rp1 on end # RP #1 PCH SLOT2
device pci 1c.1 off end # RP #2 device ref pcie_rp2 off end # RP #2
device pci 1c.2 off end # RP #3 device ref pcie_rp3 off end # RP #3
device pci 1c.3 off end # RP #4 device ref pcie_rp4 off end # RP #4
device pci 1c.4 on end # RP #5 PCH SLOT3 device ref pcie_rp5 on end # RP #5 PCH SLOT3
device pci 1c.5 off end # RP #6 device ref pcie_rp6 off end # RP #6
device pci 1c.6 on end # RP #7 PCH SLOT5 device ref pcie_rp7 on end # RP #7 PCH SLOT5
device pci 1c.7 on # RP #8 device ref pcie_rp8 on # RP #8
device pci 00.0 on end # 574 GbE LAN2 device pci 00.0 on end # 574 GbE LAN2
end end
device pci 1d.0 on end # EHCI #1 device ref ehci1 on end # EHCI #1
device pci 1e.0 on end # PCI bridge device ref pci_bridge on end # PCI bridge
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 off end # Parallel port device pnp 2e.1 off end # Parallel port
@ -108,10 +108,10 @@ chip northbridge/intel/sandybridge
device pnp c31.0 on end # TPM device pnp c31.0 on end # TPM
end end
end end
device pci 1f.2 on end # SATA (AHCI) device ref sata1 on end # SATA (AHCI)
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA (Legacy) device ref sata2 off end # SATA (Legacy)
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

54
src/mainboard/supermicro/x9scl/devicetree.cb
View File

@ -1,11 +1,11 @@
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x15d9 0x0624 inherit subsystemid 0x15d9 0x0624 inherit
device pci 00.0 on end # Host bridge device ref host_bridge on end # Host bridge
device pci 01.0 on end # PEG device ref peg10 on end # PEG
device pci 01.1 on end # PEG device ref peg11 on end # PEG
device pci 02.0 off end # iGPU device ref igd off end # iGPU
device pci 06.0 on end # PEG device ref peg60 on end # PEG
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x00fc0a01" # NCT6776 SuperIO (0x0a00-0aff) register "gen1_dec" = "0x00fc0a01" # NCT6776 SuperIO (0x0a00-0aff)
register "gen2_dec" = "0x00fc1641" # WPCM450 SuperIO (0x1600-16ff) register "gen2_dec" = "0x00fc1641" # WPCM450 SuperIO (0x1600-16ff)
@ -16,32 +16,32 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x3f" register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
device pci 16.0 off end # Management Engine Interface 1 device ref mei1 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device ref mei2 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device ref me_ide_r off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device ref me_kt off end # Management Engine KT
device pci 19.0 on # Intel Gigabit Ethernet (not for X9SCL+-F) device ref gbe on # Intel Gigabit Ethernet (not for X9SCL+-F)
subsystemid 0x15d9 0x1502 subsystemid 0x15d9 0x1502
end end
device pci 1a.0 on end # USB2 EHCI #2 device ref ehci2 on end # USB2 EHCI #2
device pci 1b.0 off end # High Definition Audio device ref hda off end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1 device ref pcie_rp1 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device ref pcie_rp2 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3 device ref pcie_rp3 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device ref pcie_rp4 off end # PCIe Port #4
device pci 1c.4 on # PCIe Port #5 device ref pcie_rp5 on # PCIe Port #5
device pci 00.0 on end # primary 574 GigE device pci 00.0 on end # primary 574 GigE
end end
device pci 1c.5 off end # PCIe Port #6 device ref pcie_rp6 off end # PCIe Port #6
device pci 1c.6 on # PCIe Port #7 device ref pcie_rp7 on # PCIe Port #7
device pci 00.0 on end # secondary 574 GigE on X9SCL+-F device pci 00.0 on end # secondary 574 GigE on X9SCL+-F
end end
device pci 1c.7 off end # PCIe Port #8 device ref pcie_rp8 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device ref ehci1 on end # USB2 EHCI #1
device pci 1e.0 on # PCI bridge device ref pci_bridge on # PCI bridge
device pci 03.0 on end # Matrox G200e in BMC device pci 03.0 on end # Matrox G200e in BMC
end end
device pci 1f.0 on # LPC bridge device ref lpc on # LPC bridge
chip superio/nuvoton/nct6776 chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 off end # Parallel port device pnp 2e.1 off end # Parallel port
@ -105,10 +105,10 @@ chip northbridge/intel/sandybridge
device pnp 164e.6 off end device pnp 164e.6 off end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device ref sata1 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device ref smbus on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device ref sata2 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device ref thermal off end # Thermal
end end
end end
end end

33
src/northbridge/intel/sandybridge/chipset.cb
View File

@ -10,5 +10,38 @@ chip northbridge/intel/sandybridge
end end
device domain 0 on device domain 0 on
ops sandybridge_pci_domain_ops ops sandybridge_pci_domain_ops
device pci 00.0 alias host_bridge on end # host bridge
device pci 01.0 alias peg10 off end # PEG10
device pci 01.1 alias peg11 off end # PEG11
device pci 01.2 alias peg12 off end # PEG12
device pci 02.0 alias igd off end # vga controller
device pci 04.0 alias dev4 off end # Device 4
device pci 06.0 alias peg60 off end # PEG60
chip southbridge/intel/bd82x6x # Intel Series 6/7 PCH
device pci 14.0 alias xhci off end # USB 3.0 Controller (only on 7 series)
device pci 16.0 alias mei1 on end # Management Engine Interface 1
device pci 16.1 alias mei2 off end # Management Engine Interface 2
device pci 16.2 alias me_ide_r off end # Management Engine IDE-R
device pci 16.3 alias me_kt off end # Management Engine KT
device pci 19.0 alias gbe off end # Intel Gigabit Ethernet
device pci 1a.0 alias ehci2 off end # USB2 EHCI #2
device pci 1b.0 alias hda off end # High Definition Audio
device pci 1c.0 alias pcie_rp1 off end # PCIe Port #1
device pci 1c.1 alias pcie_rp2 off end # PCIe Port #2
device pci 1c.2 alias pcie_rp3 off end # PCIe Port #3
device pci 1c.3 alias pcie_rp4 off end # PCIe Port #4
device pci 1c.4 alias pcie_rp5 off end # PCIe Port #5
device pci 1c.5 alias pcie_rp6 off end # PCIe Port #6
device pci 1c.6 alias pcie_rp7 off end # PCIe Port #7
device pci 1c.7 alias pcie_rp8 off end # PCIe Port #8
device pci 1d.0 alias ehci1 off end # USB2 EHCI #1
device pci 1e.0 alias pci_bridge off end # PCI bridge
device pci 1f.0 alias lpc on end # LPC bridge
device pci 1f.2 alias sata1 off end # SATA Controller 1
device pci 1f.3 alias smbus on end # SMBus
device pci 1f.5 alias sata2 off end # SATA Controller 2
device pci 1f.6 alias thermal off end # Thermal
end
end end
end end