Thanks to Myles' patch adding support for include statements,
refactoring Config.lb became possible. Factor out ROM size calculation from Config.lb. This patch converts 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Abuild works for all changed boards on khepri. Myles writes: I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
1089509725
commit
b5e10bcf1f
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@ -18,19 +18,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
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else
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default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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default ROM_SECTION_OFFSET = 0
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end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
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+ ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 64 * 1024
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE
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@ -18,19 +18,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
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else
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default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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default ROM_SECTION_OFFSET = 0
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end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
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+ ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 64 * 1024
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE
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@ -18,19 +18,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
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else
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default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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default ROM_SECTION_OFFSET = 0
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end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
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+ ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 64 * 1024
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE
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@ -18,19 +18,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
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else
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default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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default ROM_SECTION_OFFSET = 0
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end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
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+ ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 64 * 1024
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE
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@ -1,38 +1,4 @@
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
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##
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## Set all of the defaults for an x86 architecture
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##
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##
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
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arch i386 end
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
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##
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## Set all of the defaults for an x86 architecture
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##
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##
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
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arch i386 end
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@ -1,36 +1,4 @@
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
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##
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## Set all of the defaults for an x86 architecture
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@ -1,50 +1,4 @@
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FAILOVER_IMAGE
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default ROM_SECTION_SIZE = FAILOVER_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
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else
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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if USE_FAILOVER_IMAGE
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
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else
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if USE_FALLBACK_IMAGE
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
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else
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
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end
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end
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include /config/failovercalculation.lb
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arch i386 end
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@ -17,53 +17,7 @@
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
|
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##
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if USE_FAILOVER_IMAGE
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default ROM_SECTION_SIZE = FAILOVER_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
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else
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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end
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|
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##
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## Compute the start location and size size of
|
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## The coreboot bootloader.
|
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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|
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##
|
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## Compute where this copy of coreboot will start in the boot rom
|
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##
|
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
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|
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##
|
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## Compute a range of ROM that can cached to speed up coreboot,
|
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## execution speed.
|
||||
##
|
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## XIP_ROM_SIZE must be a power of 2.
|
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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#
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if USE_FAILOVER_IMAGE
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
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else
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if USE_FALLBACK_IMAGE
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
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else
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
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end
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end
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include /config/failovercalculation.lb
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arch i386 end
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||||
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|
|
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@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
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end
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||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
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##
|
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -21,33 +21,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
# XIP_ROM_SIZE must be a power of 2.
|
||||
# XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE.
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
# Needed by irq_tables and mptable and acpi_tables.
|
||||
|
|
|
@ -20,20 +20,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 65536
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_MP_TABLE object mptable.o end
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_MP_TABLE object mptable.o end
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -18,19 +18,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -19,18 +19,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -21,53 +21,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,53 +19,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,50 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -19,18 +19,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -20,41 +20,7 @@
|
|||
|
||||
## Based on Config.lb from AMD's DB800 and DBM690T mainboards.
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -20,40 +20,7 @@
|
|||
|
||||
## Based on Config.lb from AMD's DB800 and DBM690T mainboards.
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,21 +18,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -22,52 +22,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of the coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot ROM.
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can be cached to speed up coreboot
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2 (here 64 Kbyte)
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE = (64 * 1024)
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -18,33 +18,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -22,39 +22,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -22,40 +22,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -19,53 +19,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,39 +18,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 65536
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -1,37 +1,5 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -16,53 +16,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,53 +19,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,40 +19,7 @@
|
|||
##
|
||||
##
|
||||
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 65536
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -18,19 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
|
||||
+ ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE
|
||||
|
|
|
@ -1,37 +1,5 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,41 +1,8 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
||||
##
|
||||
## Build the objects we have code for in this directory.
|
||||
##
|
||||
|
|
|
@ -1,37 +1,5 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,50 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,53 +19,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,53 +19,7 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FAILOVER_IMAGE
|
||||
default ROM_SECTION_SIZE = FAILOVER_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
|
||||
if USE_FAILOVER_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
else
|
||||
if USE_FALLBACK_IMAGE
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
|
||||
else
|
||||
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
|
||||
end
|
||||
end
|
||||
include /config/failovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,37 +1,5 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -1,37 +1,5 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
|
||||
arch i386 end
|
||||
|
||||
|
|
|
@ -19,18 +19,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -1,36 +1,4 @@
|
|||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
|
@ -18,18 +18,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
|
||||
else
|
||||
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
|
||||
default XIP_ROM_SIZE = 64 * 1024
|
||||
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
arch i386 end
|
||||
driver mainboard.o
|
||||
if HAVE_PIRQ_TABLE object irq_tables.o end
|
||||
|
|
|
@ -19,39 +19,7 @@
|
|||
## MA 02110-1301 USA
|
||||
##
|
||||
|
||||
##
|
||||
## Compute the location and size of where this firmware image
|
||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
||||
##
|
||||
if USE_FALLBACK_IMAGE
|
||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
else
|
||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
||||
default ROM_SECTION_OFFSET = 0
|
||||
end
|
||||
|
||||
##
|
||||
## Compute the start location and size size of
|
||||
## The coreboot bootloader.
|
||||
##
|
||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
|
||||
##
|
||||
## Compute where this copy of coreboot will start in the boot rom
|
||||
##
|
||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
||||
|
||||
##
|
||||
## Compute a range of ROM that can cached to speed up coreboot,
|
||||
## execution speed.
|
||||
##
|
||||
## XIP_ROM_SIZE must be a power of 2.
|
||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
||||
##
|
||||
default XIP_ROM_SIZE=65536
|
||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
||||
include /config/nofailovercalculation.lb
|
||||
|
||||
##
|
||||
## Set all of the defaults for an x86 architecture
|
||||
|
|
Loading…
Reference in New Issue