soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS

The build system for the SeaBIOS payload needs this when
DRIVERS_UART_8250MEM is set. Set it to the first uart controller,
which the coreboot code also seems to do.

Fixes: https://ticket.coreboot.org/issues/150

Change-Id: I962f750f89e0352082e0b7415ceaa9bd350fdf0b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/amd/stoneyridge/Kconfig

@@ -284,6 +284,11 @@ config STONEYRIDGE_UART
 	  to FEDC_6FFFh. UART controller 1 registers
 	  range from FEDC_8000h to FEDC_8FFFh.
 
+config CONSOLE_UART_BASE_ADDRESS
+	depends on CONSOLE_SERIAL
+	hex
+	default 0xfedc6000
+
 config SMM_TSEG_SIZE
 	hex
 	default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER