GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

device/pci_ops: Rename 'where' to 'reg' 

One could understand 'where' as bus, device, function
or register. Make it clear it is register.

Change-Id: I95d0330ba40510e48be70ca1d8f58aca66c8f695
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2019-03-11 20:33:01 +02:00
parent 5517246a0d
commit b603fdc462
6 changed files with 116 additions and 116 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
src/arch/x86/include/arch/pci_io_cfg.h
View File

@ -19,60 +19,60 @@
#include <device/pci_type.h>
static __always_inline
uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t where)
uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg)
{
if (CONFIG(PCI_IO_CFG_EXT)) {
// seg == 0
return dev >> 4 | (where & 0xff) | ((where & 0xf00) << 16);
return dev >> 4 | (reg & 0xff) | ((reg & 0xf00) << 16);
} else {
return dev >> 4 | where;
return dev >> 4 | reg;
}
}
static __always_inline
uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t where)
uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inb(0xCFC + (addr & 3));
}
static __always_inline
uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t where)
uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inw(0xCFC + (addr & 2));
}
static __always_inline
uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t where)
uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inl(0xCFC);
}
static __always_inline
void pci_io_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outb(value, 0xCFC + (addr & 3));
}
static __always_inline
void pci_io_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outw(value, 0xCFC + (addr & 2));
}
static __always_inline
void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
uint32_t addr = pci_io_encode_addr(dev, where);
uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outl(value, 0xCFC);
}
@ -85,39 +85,39 @@ void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
*/
static __always_inline
uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where)
uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
{
return pci_io_read_config8(dev, where);
return pci_io_read_config8(dev, reg);
}
static __always_inline
uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where)
uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
{
return pci_io_read_config16(dev, where);
return pci_io_read_config16(dev, reg);
}
static __always_inline
uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where)
uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
{
return pci_io_read_config32(dev, where);
return pci_io_read_config32(dev, reg);
}
static __always_inline
void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
pci_io_write_config8(dev, where, value);
pci_io_write_config8(dev, reg, value);
}
static __always_inline
void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
pci_io_write_config16(dev, where, value);
pci_io_write_config16(dev, reg, value);
}
static __always_inline
void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
pci_io_write_config32(dev, where, value);
pci_io_write_config32(dev, reg, value);
}
#endif

42
src/arch/x86/pci_ops_conf1.c
View File

@ -19,50 +19,50 @@
*/
#if !CONFIG(PCI_IO_CFG_EXT)
#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \
((dev)->path.pci.devfn << 8) | (where & ~3))
#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \
((dev)->path.pci.devfn << 8) | (reg & ~3))
#else
#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \
((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\
((where & 0xf00)<<16))
#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \
((dev)->path.pci.devfn << 8) | ((reg & 0xff) & ~3) |\
((reg & 0xf00)<<16))
#endif
static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t where)
static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t reg)
{
outl(CONF_CMD(dev, where), 0xCF8);
return inb(0xCFC + (where & 3));
outl(CONF_CMD(dev, reg), 0xCF8);
return inb(0xCFC + (reg & 3));
}
static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t where)
static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t reg)
{
outl(CONF_CMD(dev, where), 0xCF8);
return inw(0xCFC + (where & 2));
outl(CONF_CMD(dev, reg), 0xCF8);
return inw(0xCFC + (reg & 2));
}
static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t where)
static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t reg)
{
outl(CONF_CMD(dev, where), 0xCF8);
outl(CONF_CMD(dev, reg), 0xCF8);
return inl(0xCFC);
}
static void pci_conf1_write_config8(const struct device *dev, uint16_t where,
static void pci_conf1_write_config8(const struct device *dev, uint16_t reg,
uint8_t value)
{
outl(CONF_CMD(dev, where), 0xCF8);
outb(value, 0xCFC + (where & 3));
outl(CONF_CMD(dev, reg), 0xCF8);
outb(value, 0xCFC + (reg & 3));
}
static void pci_conf1_write_config16(const struct device *dev, uint16_t where,
static void pci_conf1_write_config16(const struct device *dev, uint16_t reg,
uint16_t value)
{
outl(CONF_CMD(dev, where), 0xCF8);
outw(value, 0xCFC + (where & 2));
outl(CONF_CMD(dev, reg), 0xCF8);
outw(value, 0xCFC + (reg & 2));
}
static void pci_conf1_write_config32(const struct device *dev, uint16_t where,
static void pci_conf1_write_config32(const struct device *dev, uint16_t reg,
uint32_t value)
{
outl(CONF_CMD(dev, where), 0xCF8);
outl(CONF_CMD(dev, reg), 0xCF8);
outl(value, 0xCFC);
}

28
src/device/pci_ops_mmconf.c
View File

@ -23,43 +23,43 @@
* Functions for accessing PCI configuration space with mmconf accesses
*/
#define PCI_MMIO_ADDR(dev, where, mask) \
#define PCI_MMIO_ADDR(dev, reg, mask) \
((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\
(((dev)->bus->secondary & 0xFFF) << 20) |\
(((dev)->path.pci.devfn & 0xFF) << 12) |\
((where) & 0xFFF)) & ~mask))
((reg) & 0xFFF)) & ~mask))
static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t where)
static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t reg)
{
return read8(PCI_MMIO_ADDR(dev, where, 0));
return read8(PCI_MMIO_ADDR(dev, reg, 0));
}
static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t where)
static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t reg)
{
return read16(PCI_MMIO_ADDR(dev, where, 1));
return read16(PCI_MMIO_ADDR(dev, reg, 1));
}
static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t where)
static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t reg)
{
return read32(PCI_MMIO_ADDR(dev, where, 3));
return read32(PCI_MMIO_ADDR(dev, reg, 3));
}
static void pci_mmconf_write_config8(const struct device *dev, uint16_t where,
static void pci_mmconf_write_config8(const struct device *dev, uint16_t reg,
uint8_t value)
{
write8(PCI_MMIO_ADDR(dev, where, 0), value);
write8(PCI_MMIO_ADDR(dev, reg, 0), value);
}
static void pci_mmconf_write_config16(const struct device *dev, uint16_t where,
static void pci_mmconf_write_config16(const struct device *dev, uint16_t reg,
uint16_t value)
{
write16(PCI_MMIO_ADDR(dev, where, 1), value);
write16(PCI_MMIO_ADDR(dev, reg, 1), value);
}
static void pci_mmconf_write_config32(const struct device *dev, uint16_t where,
static void pci_mmconf_write_config32(const struct device *dev, uint16_t reg,
uint32_t value)
{
write32(PCI_MMIO_ADDR(dev, where, 3), value);
write32(PCI_MMIO_ADDR(dev, reg, 3), value);
}
static const struct pci_bus_operations pci_ops_mmconf = {

12
src/include/device/pci.h
View File

@ -35,12 +35,12 @@ struct pci_operations {
/* Common pci bus operations */
struct pci_bus_operations {
uint8_t (*read8)(const struct device *dev, uint16_t where);
uint16_t (*read16)(const struct device *dev, uint16_t where);
uint32_t (*read32)(const struct device *dev, uint16_t where);
void (*write8)(const struct device *dev, uint16_t where, uint8_t val);
void (*write16)(const struct device *dev, uint16_t where, uint16_t val);
void (*write32)(const struct device *dev, uint16_t where, uint32_t val);
uint8_t (*read8)(const struct device *dev, uint16_t reg);
uint16_t (*read16)(const struct device *dev, uint16_t reg);
uint32_t (*read32)(const struct device *dev, uint16_t reg);
void (*write8)(const struct device *dev, uint16_t reg, uint8_t val);
void (*write16)(const struct device *dev, uint16_t reg, uint16_t val);
void (*write32)(const struct device *dev, uint16_t reg, uint32_t val);
};
struct pci_driver {

48
src/include/device/pci_mmio_cfg.h
View File

@ -22,50 +22,50 @@
static __always_inline
uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t where)
uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where);
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg);
return read8(addr);
}
static __always_inline
uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t where)
uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1));
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1));
return read16(addr);
}
static __always_inline
uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t where)
uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3));
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3));
return read32(addr);
}
static __always_inline
void pci_mmio_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
void pci_mmio_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where);
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg);
write8(addr, value);
}
static __always_inline
void pci_mmio_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
void pci_mmio_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1));
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1));
write16(addr, value);
}
static __always_inline
void pci_mmio_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3));
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3));
write32(addr, value);
}
@ -77,39 +77,39 @@ void pci_mmio_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
*/
static __always_inline
uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where)
uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
{
return pci_mmio_read_config8(dev, where);
return pci_mmio_read_config8(dev, reg);
}
static __always_inline
uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where)
uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
{
return pci_mmio_read_config16(dev, where);
return pci_mmio_read_config16(dev, reg);
}
static __always_inline
uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where)
uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
{
return pci_mmio_read_config32(dev, where);
return pci_mmio_read_config32(dev, reg);
}
static __always_inline
void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
pci_mmio_write_config8(dev, where, value);
pci_mmio_write_config8(dev, reg, value);
}
static __always_inline
void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
pci_mmio_write_config16(dev, where, value);
pci_mmio_write_config16(dev, reg, value);
}
static __always_inline
void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
pci_mmio_write_config32(dev, where, value);
pci_mmio_write_config32(dev, reg, value);
}
#endif

48
src/include/device/pci_ops.h
View File

@ -55,83 +55,83 @@ static __always_inline void pcidev_assert(const struct device *dev)
}
static __always_inline
u8 pci_read_config8(const struct device *dev, u16 where)
u8 pci_read_config8(const struct device *dev, u16 reg)
{
pcidev_assert(dev);
return pci_bus_ops()->read8(dev, where);
return pci_bus_ops()->read8(dev, reg);
}
static __always_inline
u16 pci_read_config16(const struct device *dev, u16 where)
u16 pci_read_config16(const struct device *dev, u16 reg)
{
pcidev_assert(dev);
return pci_bus_ops()->read16(dev, where);
return pci_bus_ops()->read16(dev, reg);
}
static __always_inline
u32 pci_read_config32(const struct device *dev, u16 where)
u32 pci_read_config32(const struct device *dev, u16 reg)
{
pcidev_assert(dev);
return pci_bus_ops()->read32(dev, where);
return pci_bus_ops()->read32(dev, reg);
}
static __always_inline
void pci_write_config8(const struct device *dev, u16 where, u8 val)
void pci_write_config8(const struct device *dev, u16 reg, u8 val)
{
pcidev_assert(dev);
pci_bus_ops()->write8(dev, where, val);
pci_bus_ops()->write8(dev, reg, val);
}
static __always_inline
void pci_write_config16(const struct device *dev, u16 where, u16 val)
void pci_write_config16(const struct device *dev, u16 reg, u16 val)
{
pcidev_assert(dev);
pci_bus_ops()->write16(dev, where, val);
pci_bus_ops()->write16(dev, reg, val);
}
static __always_inline
void pci_write_config32(const struct device *dev, u16 where, u32 val)
void pci_write_config32(const struct device *dev, u16 reg, u32 val)
{
pcidev_assert(dev);
pci_bus_ops()->write32(dev, where, val);
pci_bus_ops()->write32(dev, reg, val);
}
#endif
#ifdef __SIMPLE_DEVICE__
static __always_inline
void pci_or_config8(pci_devfn_t dev, u16 where, u8 ormask)
void pci_or_config8(pci_devfn_t dev, u16 reg, u8 ormask)
#else
static __always_inline
void pci_or_config8(const struct device *dev, u16 where, u8 ormask)
void pci_or_config8(const struct device *dev, u16 reg, u8 ormask)
#endif
{
u8 value = pci_read_config8(dev, where);
pci_write_config8(dev, where, value | ormask);
u8 value = pci_read_config8(dev, reg);
pci_write_config8(dev, reg, value | ormask);
}
#ifdef __SIMPLE_DEVICE__
static __always_inline
void pci_or_config16(pci_devfn_t dev, u16 where, u16 ormask)
void pci_or_config16(pci_devfn_t dev, u16 reg, u16 ormask)
#else
static __always_inline
void pci_or_config16(const struct device *dev, u16 where, u16 ormask)
void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
#endif
{
u16 value = pci_read_config16(dev, where);
pci_write_config16(dev, where, value | ormask);
u16 value = pci_read_config16(dev, reg);
pci_write_config16(dev, reg, value | ormask);
}
#ifdef __SIMPLE_DEVICE__
static __always_inline
void pci_or_config32(pci_devfn_t dev, u16 where, u32 ormask)
void pci_or_config32(pci_devfn_t dev, u16 reg, u32 ormask)
#else
static __always_inline
void pci_or_config32(const struct device *dev, u16 where, u32 ormask)
void pci_or_config32(const struct device *dev, u16 reg, u32 ormask)
#endif
{
u32 value = pci_read_config32(dev, where);
pci_write_config32(dev, where, value | ormask);
u32 value = pci_read_config32(dev, reg);
pci_write_config32(dev, reg, value | ormask);
}
#ifdef __SIMPLE_DEVICE__