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sb/intel/i82801jx: Drop `p_cnt_throttling_supported` 

The three mainboards using this southbridge do not support it.

Change-Id: I006f1ec26c40f7e2dfc2ddedb017278455368bb9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42655
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-06-21 16:16:22 +02:00
parent 547fe82cd0
commit b60aeca26c
2 changed files with 1 additions and 5 deletions
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1
src/southbridge/intel/i82801jx/chip.h
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@ -49,7 +49,6 @@ struct southbridge_intel_i82801jx_config {
int c5_enable : 1; int c5_enable : 1;
int c6_enable : 1; int c6_enable : 1;
int c3_latency; int c3_latency;
int p_cnt_throttling_supported:1;
int docking_supported:1; int docking_supported:1;
int throttle_duty : 3; int throttle_duty : 3;

3
src/southbridge/intel/i82801jx/fadt.c
View File

@ -46,9 +46,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->flush_size = 0; fadt->flush_size = 0;
fadt->flush_stride = 0; fadt->flush_stride = 0;
fadt->duty_offset = 1; fadt->duty_offset = 1;
if (chip->p_cnt_throttling_supported)
fadt->duty_width = 3;
else
fadt->duty_width = 0; fadt->duty_width = 0;
fadt->day_alrm = 0xd; fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00; fadt->mon_alrm = 0x00;