Vendor specific patch, thus self-acked.

* going back to old board specific dsdt for agami aruma. This is hopefully dropped again some day, but until then here's a working solution. * Some minor Agami specific changes. * drop obsolete bringup workaround hyperclocking.diff * increase image size again, x86emu wants it. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-12 00:12:41 +00:00 · 2007-04-12 00:12:41 +00:00 · b615c7bb3a
parent 2f7b1deca3
commit b615c7bb3a
8 changed files with 2300 additions and 198 deletions
--- a/src/mainboard/agami/aruma/Config.lb
+++ b/src/mainboard/agami/aruma/Config.lb
@ -43,57 +43,62 @@ if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end

 #needed by irq_tables and mptable and acpi_tables
-object get_bus_conf.o
+#object get_bus_conf.o

 if HAVE_ACPI_TABLES
- 	object acpi_tables.o
+ 	object acpi_tables_static.o
 	object fadt.o
-	
-	makerule dsdt.c
-		depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
-		action  "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
-		action  "mv dsdt_lb.hex dsdt.c"
-	end
-	object ./dsdt.o

-	makerule ssdt.c
-		depends "$(MAINBOARD)/ssdt_lb_x.dsl"
-		action  "iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl"
-		action  "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex"
-		action  "mv ssdt_lb_x.hex ssdt.c"
-	end
-	object ./ssdt.o
-	
-	if ACPI_SSDTX_NUM
-		makerule ssdt2.c
-			depends "$(MAINBOARD)/dx/pci2.asl"
-			action  "iasl -tc $(MAINBOARD)/dx/pci2.asl"
-			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
-			action  "mv pci2.hex ssdt2.c"
-		end
-		object ./ssdt2.o
-		makerule ssdt3.c
-			depends "$(MAINBOARD)/dx/pci3.asl"
-			action  "iasl -tc $(MAINBOARD)/dx/pci3.asl"
-			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
-			action  "mv pci3.hex ssdt3.c"
-		end
-		object ./ssdt3.o
-		makerule ssdt4.c
-			depends "$(MAINBOARD)/dx/pci4.asl"
-			action  "iasl -tc $(MAINBOARD)/dx/pci4.asl"
-			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
-			action  "mv pci4.hex ssdt4.c"
-		end
-		object ./ssdt4.o
+	object dsdt.o

-	end
+#	makerule dsdt.c
+#		depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
+#		action  "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
+#		action  "mv dsdt_lb.hex dsdt.c"
+#	end
+#	object ./dsdt.o
+#
+#	makerule ssdt.c
+#		depends "$(MAINBOARD)/ssdt_lb_x.dsl"
+#		action  "iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl"
+#		action  "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex"
+#		action  "mv ssdt_lb_x.hex ssdt.c"
+#	end
+#	object ./ssdt.o
+#	
+#	if ACPI_SSDTX_NUM
+#		makerule ssdt2.c
+#			depends "$(MAINBOARD)/dx/pci2.asl"
+#			action  "iasl -tc $(MAINBOARD)/dx/pci2.asl"
+#			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
+#			action  "mv pci2.hex ssdt2.c"
+#		end
+#		object ./ssdt2.o
+#		makerule ssdt3.c
+#			depends "$(MAINBOARD)/dx/pci3.asl"
+#			action  "iasl -tc $(MAINBOARD)/dx/pci3.asl"
+#			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
+#			action  "mv pci3.hex ssdt3.c"
+#		end
+#		object ./ssdt3.o
+#		makerule ssdt4.c
+#			depends "$(MAINBOARD)/dx/pci4.asl"
+#			action  "iasl -tc $(MAINBOARD)/dx/pci4.asl"
+#			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
+#			action  "mv pci4.hex ssdt4.c"
+#		end
+#		object ./ssdt4.o
+#
+#	end
 end



 #object reset.o

+# FIXME: This should be solved generically.
+#object vgabios.o
+#driver atiragexl.o

 if USE_DCACHE_RAM

--- a/src/mainboard/agami/aruma/Options.lb
+++ b/src/mainboard/agami/aruma/Options.lb
@ -54,11 +54,19 @@ uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
 uses CONFIG_CHIP_NAME

+uses HT_CHAIN_UNITID_BASE
+uses HT_CHAIN_END_UNITID_BASE
+uses SB_HT_CHAIN_ON_BUS0
+uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
+
 uses USE_DCACHE_RAM
 uses DCACHE_RAM_BASE
 uses DCACHE_RAM_SIZE
 uses CONFIG_USE_INIT

+uses CONFIG_USE_PRINTK_IN_CAR
+
+
 uses SERIAL_CPU_INIT

 uses ENABLE_APIC_EXT_ID
@ -133,6 +141,18 @@ default ENABLE_APIC_EXT_ID=1
 default APIC_ID_OFFSET=0x10
 default LIFT_BSP_APIC_ID=0

+#HT Unit ID offset
+#default HT_CHAIN_UNITID_BASE=0xa
+
+#real SB Unit ID
+#default HT_CHAIN_END_UNITID_BASE=0x6
+
+#make the SB HT chain on bus 0
+#default SB_HT_CHAIN_ON_BUS0=1
+
+#allow capable device use that above 4G
+#default CONFIG_PCI_64BIT_PREF_MEM=1
+
 ##
 ## enable CACHE_AS_RAM specifics
 ##
@ -140,6 +160,8 @@ default USE_DCACHE_RAM=1
 default DCACHE_RAM_BASE=0xcc000
 default DCACHE_RAM_SIZE=0x4000
 default CONFIG_USE_INIT=0
+#default CONFIG_USE_INIT=1
+#default CONFIG_USE_PRINTK_IN_CAR=1

 ##
 ## Build code to setup a generic IOAPIC
@ -248,6 +270,8 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
 #VGA
 default CONFIG_CONSOLE_VGA=1
 default CONFIG_PCI_ROM_RUN=1
+#default CONFIG_CONSOLE_VGA=0
+#default CONFIG_PCI_ROM_RUN=0

 ### End Options.lb
 end
--- a/src/mainboard/agami/aruma/acpi_tables_static.c
+++ b/src/mainboard/agami/aruma/acpi_tables_static.c
@ -0,0 +1,239 @@
+/*
+ * Agami Aruma ACPI support
+ * 
+ * written by Stefan Reinauer <stepan@coresystems.de>
+ *  (C) 2005 Stefan Reinauer
+ *  (C) 2007 coresystems GmbH
+ */
+
+#include <console/console.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+extern unsigned char AmlCode[];
+
+#define IO_APIC_ADDR	0xfec00000UL
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	unsigned int gsi_base=0x18, ioapic_nr=2, i;
+	device_t dev=0;
+ 
+	/* create all subtables for 4p */
+	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0); //SDE BSP APIC ID=0
+	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 17);
+	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 18);
+	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 19);
+	
+	/* Write 8111 IOAPIC */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 1,
+			IO_APIC_ADDR, 0);
+
+        /* Write the first 8131 IOAPICs */
+	for(i = 0; i < 2; i++) {
+		if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev)){
+        		ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
+			ioapic_nr++;
+		}
+	}
+
+	/* Write the 8132 IOAPICs if they exist */	
+	for(i = 0; i < 4; i++) {
+		if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7459, dev)){
+        		ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
+			ioapic_nr++;
+		}
+	}
+
+	/* in the event there were no 8132s reset dev and look for the 8131s */
+        /* first skip the onboard 8131 */
+        dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, 0);
+        dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev);
+
+        /* Write all 8131 IOAPICs */
+	while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev))) {
+        	ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
+		ioapic_nr++;
+	}
+
+	current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
+			current, 1, 0, 2, 0 );
+
+	current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
+			current, 1, 0, 2, 0 );
+
+	return current;
+}
+
+
+/* The next two tables are used by our DSDT and are freely defined
+ * here. This construct is used because the bus numbers containing 
+ * the 8131 bridges may vary so that we need to pass LinuxBIOS 
+ * knowledge into the DSDT
+ */
+typedef struct lnxc_busses {
+	u8 secondary;
+	u8 subordinate;
+} acpi_lnxb_busses_t;
+
+typedef struct acpi_lnxb {
+	struct acpi_table_header header;
+	acpi_lnxb_busses_t busses[5];
+} acpi_lnxb_t;
+
+/* special linuxbios acpi table */
+void acpi_create_lnxb(acpi_lnxb_t *lnxb)
+{
+	device_t dev;
+	int busidx=0;
+	
+        acpi_header_t *header=&(lnxb->header);
+
+        /* fill out header fields */
+        memcpy(header->signature, "LNXB", 4);
+        memcpy(header->oem_id, OEM_ID, 6);
+        memcpy(header->oem_table_id, "LNXBIOS ", 8);
+        memcpy(header->asl_compiler_id, ASLC, 4);
+
+        header->length = sizeof(acpi_lnxb_t);
+        header->revision = 1;
+
+	/* 
+	 * Write external 8131 bus ranges 
+	 */
+	/* first skip the onboard 8131 */
+	dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
+	dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
+	/* now look at the last 8131 in each chain, 
+	 * as it contains the valid bus ranges
+	 */
+	/* Add a check for 8132 devices, device ID == 0x7458 */
+	while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7458, dev)) 
+			&& busidx<5 ) {
+		int subu, fn, slot;
+		acpi_lnxb_busses_t *busses;
+		
+		if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
+			continue;
+		
+		busses=&(lnxb->busses[busidx]);
+		lnxb->busses[busidx].secondary	 = dev->bus->secondary;
+		lnxb->busses[busidx].subordinate = 
+			pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+#if 0	
+	        /*  SDE-test print out lnbx table values  */
+		printk_info("ACPI: 7458 lnxb value, secondary %lx, subordinate %1x \n", 
+                	lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
+#endif		
+		busidx++;
+	}
+	dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
+	dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
+	while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev)) 
+			&& busidx<5 ) {
+		int subu, fn, slot;
+		acpi_lnxb_busses_t *busses;
+		
+		if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
+			continue;
+		
+		busses=&(lnxb->busses[busidx]);
+		lnxb->busses[busidx].secondary	 = dev->bus->secondary;
+		lnxb->busses[busidx].subordinate = 
+			pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+#if 0	
+	        /*  SDE-test print out lnbx table values  */
+		printk_info("ACPI: 7450 lnxb value, secondary %lx, subordinate %1x \n", 
+                	lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
+#endif		
+		busidx++;
+	}
+	header->checksum = acpi_checksum((void *)lnxb, sizeof(acpi_lnxb_t));
+}
+
+
+
+unsigned long write_acpi_tables(unsigned long start)
+{
+	unsigned long current;
+	acpi_rsdp_t *rsdp;
+	acpi_rsdt_t *rsdt;
+	acpi_hpet_t *hpet;
+	acpi_madt_t *madt;
+	acpi_fadt_t *fadt;
+	acpi_facs_t *facs;
+	acpi_lnxb_t *lnxb;
+	acpi_header_t *dsdt;
+
+	/* Align ACPI tables to 16byte */
+	start   = ( start + 0x0f ) & -0x10;
+	current = start;
+	
+	printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
+
+	/* We need at least an RSDP and an RSDT Table */
+	rsdp = (acpi_rsdp_t *) current;
+	current += sizeof(acpi_rsdp_t);
+	rsdt = (acpi_rsdt_t *) current;
+	current += sizeof(acpi_rsdt_t);
+
+	/* clear all table memory */
+	memset((void *)start, 0, current - start);
+	
+	acpi_write_rsdp(rsdp, rsdt);
+	acpi_write_rsdt(rsdt);
+	
+	/*
+	 * We explicitly add these tables later on:
+	 */
+	printk_debug("ACPI:    * HPET\n");
+
+	hpet = (acpi_hpet_t *) current;
+	current += sizeof(acpi_hpet_t);
+	acpi_create_hpet(hpet);
+	acpi_add_table(rsdt,hpet);
+
+	/* If we want to use HPET Timers Linux wants an MADT */
+	printk_debug("ACPI:    * MADT\n");
+
+	madt = (acpi_madt_t *) current;
+	acpi_create_madt(madt);
+	current+=madt->header.length;
+	acpi_add_table(rsdt,madt);
+
+	printk_debug("ACPI:    * LNXB\n");
+	lnxb=(acpi_lnxb_t *)current;
+	current += sizeof(acpi_facs_t);
+	acpi_create_lnxb(lnxb);
+
+	printk_debug("ACPI:    * FACS\n");
+	facs = (acpi_facs_t *) current;
+	current += sizeof(acpi_facs_t);
+	acpi_create_facs(facs);
+
+	dsdt = (acpi_header_t *)current;
+	current += ((acpi_header_t *)AmlCode)->length;
+	memcpy((void *)dsdt,(void *)AmlCode, \
+			((acpi_header_t *)AmlCode)->length);
+
+	/* fix up dsdt */
+	((u32 *)dsdt)[11]=((u32)lnxb)+sizeof(acpi_header_t);
+	
+	/* recalculate checksum */
+	dsdt->checksum = 0;
+	dsdt->checksum = acpi_checksum(dsdt,dsdt->length);
+	printk_debug("ACPI:    * DSDT @ %08x Length %x\n",dsdt,dsdt->length);
+	printk_debug("ACPI:    * FADT\n");
+	
+	fadt = (acpi_fadt_t *) current;
+	current += sizeof(acpi_fadt_t);
+
+	acpi_create_fadt(fadt,facs,dsdt);
+	acpi_add_table(rsdt,fadt);
+
+	printk_info("ACPI: done.\n");
+	return current;
+}
+
--- a/src/mainboard/agami/aruma/cache_as_ram_auto.c
+++ b/src/mainboard/agami/aruma/cache_as_ram_auto.c
@ -55,13 +55,16 @@ static void hard_reset(void)
 {
        set_bios_reset();
        pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
-        outb(0x0e, 0x0cf9);
+        //outb(0x0e, 0x0cf9);
+	outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
 }

 static void soft_reset(void)
 {
        set_bios_reset();
        pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
+        //outb(0x0e, 0x0cf9);
+	outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
 }

 /*
--- a/src/mainboard/agami/aruma/dsdt.c
+++ b/src/mainboard/agami/aruma/dsdt.c
--- a/src/mainboard/agami/aruma/hyperclocking.diff
+++ b/src/mainboard/agami/aruma/hyperclocking.diff
@ -1,155 +0,0 @@
-Index: src/config/Options.lb
-===================================================================
-RCS file: /cvsroot/freebios/freebios2/src/config/Options.lb,v
-retrieving revision 1.56
-diff -u -r1.56 Options.lb
--- src/config/Options.lb	14 Jan 2005 21:54:16 -0000	1.56
-+++ src/config/Options.lb	26 Jan 2005 09:50:04 -0000
-@@ -815,3 +815,13 @@
- 	export never
- 	comment "Configure briQ with PowerPC G4"
- end
-+###############################################
-+# Options for amd k8
-+###############################################
-+define ALLOW_HT_OVERCLOCKING
-+	default 0
-+	export always
-+	comment "Allow K8 and AMD8131 to operate at maximum speed"
-+end
-+
-+
-Index: src/devices/hypertransport.c
-===================================================================
-RCS file: /cvsroot/freebios/freebios2/src/devices/hypertransport.c,v
-retrieving revision 1.12
-diff -u -r1.12 hypertransport.c
--- src/devices/hypertransport.c	19 Jan 2005 01:19:37 -0000	1.12
-+++ src/devices/hypertransport.c	26 Jan 2005 09:50:04 -0000
-@@ -7,6 +7,9 @@
- #include <device/hypertransport.h>
- #include <part/hard_reset.h>
- #include <part/fallback_boot.h>
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+#include <pc80/mc146818rtc.h>
-+#endif
- 
- static device_t ht_scan_get_devs(device_t *old_devices)
- {
-@@ -29,6 +32,9 @@
- {
- 	/* Handle bugs in valid hypertransport frequency reporting */
- 	unsigned freq_cap;
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+	int on;
-+#endif
- 
- 	freq_cap = pci_read_config16(dev, pos);
- 	freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
-@@ -36,7 +42,12 @@
- 	/* AMD 8131 Errata 48 */
- 	if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
- 		(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+		on=0; get_option(&on, "amd8131_800MHz");
-+		if(!on) freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#else
- 		freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#endif
- 	}
- 	/* AMD 8151 Errata 23 */
- 	if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
-@@ -45,7 +56,12 @@
- 	}
- 	/* AMD K8 Unsupported 1Ghz? */
- 	if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+		on=0; get_option(&on, "amdk8_1GHz"); 
-+		if(!on) freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#else
- 		freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#endif
- 	}
- 	return freq_cap;
- }
-Index: src/northbridge/amd/amdk8/coherent_ht.c
-===================================================================
-RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/coherent_ht.c,v
-retrieving revision 1.40
-diff -u -r1.40 coherent_ht.c
--- src/northbridge/amd/amdk8/coherent_ht.c	7 Jan 2005 21:12:05 -0000	1.40
-+++ src/northbridge/amd/amdk8/coherent_ht.c	26 Jan 2005 09:50:04 -0000
-@@ -266,7 +266,13 @@
- 
- 	/* AMD 8131 Errata 48 */
- 	if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
-		freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+                if(!read_option(CMOS_VSTART_amd8131_800MHz,
-+                                CMOS_VLEN_amd8131_800MHz, 0))
-+                        freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#else
-+                freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#endif
- 	}
- 	/* AMD 8151 Errata 23 */
- 	if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
-@@ -274,7 +280,13 @@
- 	}
- 	/* AMD K8 Unsupported 1Ghz? */
- 	if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
-		freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+                if(!read_option(CMOS_VSTART_amdk8_1GHz,
-+                                CMOS_VLEN_amdk8_1GHz, 0))
-+                        freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#else
-+                freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#endif
- 	}
- 	return freq_cap;
- }
-Index: src/northbridge/amd/amdk8/incoherent_ht.c
-===================================================================
-RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/incoherent_ht.c,v
-retrieving revision 1.15
-diff -u -r1.15 incoherent_ht.c
--- src/northbridge/amd/amdk8/incoherent_ht.c	20 Jan 2005 20:41:17 -0000	1.15
-+++ src/northbridge/amd/amdk8/incoherent_ht.c	26 Jan 2005 09:50:04 -0000
-@@ -1,6 +1,7 @@
- /*
-  	This should be done by Eric
-	2004.12 yhlu add multi ht chain dynamically support
-+	2004.12 yhlu    add multi ht chain dynamically support
-+	2005.01 stepan  add HT overclocking feature
- */
- #include <device/pci_def.h>
- #include <device/pci_ids.h>
-@@ -96,7 +97,13 @@
- 
- 	/* AMD 8131 Errata 48 */
- 	if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+		if(!read_option(CMOS_VSTART_amd8131_800MHz, 
-+				CMOS_VLEN_amd8131_800MHz, 0))
-+			freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#else
- 		freq_cap &= ~(1 << HT_FREQ_800Mhz);
-+#endif
- 	}
- 	/* AMD 8151 Errata 23 */
- 	if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
-@@ -104,7 +111,13 @@
- 	}
- 	/* AMD K8 Unsupported 1Ghz? */
- 	if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
-+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-+		if(!read_option(CMOS_VSTART_amdk8_1GHz, 
-+				CMOS_VLEN_amdk8_1GHz, 0))
-+			freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#else
- 		freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-+#endif
- 	}
- 	return freq_cap;
- }
--- a/src/mainboard/agami/aruma/resourcemap.c
+++ b/src/mainboard/agami/aruma/resourcemap.c
@ -257,6 +257,12 @@ static void setup_aruma_resource_map(void)
        PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x0b050213, // CPU1 LDT2
        PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x100c0223, // CPU2 LDT2
        PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x15110133, // CPU3 LTD1
+
+	/* setup power management registers */
+	PCI_ADDR(0, 0x18, 3, 0x80), 0x80808080, 0x23070000, // PM control low
+	PCI_ADDR(0, 0x18, 3, 0x84), 0x80808080, 0x00132113, // PM control high
+	PCI_ADDR(0, 0x18, 3, 0xD8), 0x8E000000, 0x20002710, // Clock PM high
+
 	};
 	int max;
 	max = sizeof(register_values)/sizeof(register_values[0]);
--- a/targets/agami/aruma/Config.lb
+++ b/targets/agami/aruma/Config.lb
@ -12,7 +12,7 @@ option MAXIMUM_CONSOLE_LOGLEVEL=8
 romimage "normal"
        option ROM_SIZE = 512*1024-36*1024
 	option USE_FALLBACK_IMAGE=0
-	option ROM_IMAGE_SIZE=0x14000
+	option ROM_IMAGE_SIZE=0x16000
 	option XIP_ROM_SIZE=0x20000
 	option LINUXBIOS_EXTRA_VERSION=".0-normal"
 	payload ../../../../../../filo.elf
@ -20,7 +20,7 @@ end

 romimage "fallback" 
 	option USE_FALLBACK_IMAGE=1
-	option ROM_IMAGE_SIZE=0x14000
+	option ROM_IMAGE_SIZE=0x16000
 	option XIP_ROM_SIZE=0x20000
 	option LINUXBIOS_EXTRA_VERSION=".0-fallback"
 	payload ../../../../../../filo.elf