Vendor specific patch, thus self-acked.
* going back to old board specific dsdt for agami aruma. This is hopefully dropped again some day, but until then here's a working solution. * Some minor Agami specific changes. * drop obsolete bringup workaround hyperclocking.diff * increase image size again, x86emu wants it. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
2f7b1deca3
commit
b615c7bb3a
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@ -43,57 +43,62 @@ if HAVE_MP_TABLE object mptable.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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#needed by irq_tables and mptable and acpi_tables
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#needed by irq_tables and mptable and acpi_tables
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object get_bus_conf.o
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#object get_bus_conf.o
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if HAVE_ACPI_TABLES
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if HAVE_ACPI_TABLES
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object acpi_tables.o
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object acpi_tables_static.o
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object fadt.o
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object fadt.o
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makerule dsdt.c
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object dsdt.o
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depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
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action "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
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action "mv dsdt_lb.hex dsdt.c"
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end
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object ./dsdt.o
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makerule ssdt.c
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# makerule dsdt.c
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depends "$(MAINBOARD)/ssdt_lb_x.dsl"
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# depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
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action "iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl"
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# action "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
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action "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex"
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# action "mv dsdt_lb.hex dsdt.c"
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action "mv ssdt_lb_x.hex ssdt.c"
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# end
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end
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# object ./dsdt.o
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object ./ssdt.o
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#
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# makerule ssdt.c
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if ACPI_SSDTX_NUM
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# depends "$(MAINBOARD)/ssdt_lb_x.dsl"
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makerule ssdt2.c
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# action "iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl"
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depends "$(MAINBOARD)/dx/pci2.asl"
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# action "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex"
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action "iasl -tc $(MAINBOARD)/dx/pci2.asl"
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# action "mv ssdt_lb_x.hex ssdt.c"
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action "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
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# end
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action "mv pci2.hex ssdt2.c"
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# object ./ssdt.o
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end
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#
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object ./ssdt2.o
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# if ACPI_SSDTX_NUM
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makerule ssdt3.c
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# makerule ssdt2.c
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depends "$(MAINBOARD)/dx/pci3.asl"
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# depends "$(MAINBOARD)/dx/pci2.asl"
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action "iasl -tc $(MAINBOARD)/dx/pci3.asl"
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# action "iasl -tc $(MAINBOARD)/dx/pci2.asl"
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action "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
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# action "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
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action "mv pci3.hex ssdt3.c"
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# action "mv pci2.hex ssdt2.c"
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end
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# end
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object ./ssdt3.o
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# object ./ssdt2.o
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makerule ssdt4.c
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# makerule ssdt3.c
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depends "$(MAINBOARD)/dx/pci4.asl"
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# depends "$(MAINBOARD)/dx/pci3.asl"
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action "iasl -tc $(MAINBOARD)/dx/pci4.asl"
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# action "iasl -tc $(MAINBOARD)/dx/pci3.asl"
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action "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
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# action "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
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action "mv pci4.hex ssdt4.c"
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# action "mv pci3.hex ssdt3.c"
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end
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# end
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object ./ssdt4.o
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# object ./ssdt3.o
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# makerule ssdt4.c
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end
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# depends "$(MAINBOARD)/dx/pci4.asl"
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# action "iasl -tc $(MAINBOARD)/dx/pci4.asl"
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# action "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
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# action "mv pci4.hex ssdt4.c"
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# end
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# object ./ssdt4.o
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#
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# end
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end
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end
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#object reset.o
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#object reset.o
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# FIXME: This should be solved generically.
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#object vgabios.o
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#driver atiragexl.o
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if USE_DCACHE_RAM
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if USE_DCACHE_RAM
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@ -54,11 +54,19 @@ uses CONFIG_CONSOLE_VGA
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uses CONFIG_PCI_ROM_RUN
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uses CONFIG_PCI_ROM_RUN
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uses CONFIG_CHIP_NAME
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uses CONFIG_CHIP_NAME
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uses HT_CHAIN_UNITID_BASE
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uses HT_CHAIN_END_UNITID_BASE
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uses SB_HT_CHAIN_ON_BUS0
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uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
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uses USE_DCACHE_RAM
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uses USE_DCACHE_RAM
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uses DCACHE_RAM_BASE
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uses DCACHE_RAM_BASE
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uses DCACHE_RAM_SIZE
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uses DCACHE_RAM_SIZE
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uses CONFIG_USE_INIT
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uses CONFIG_USE_INIT
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uses CONFIG_USE_PRINTK_IN_CAR
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uses SERIAL_CPU_INIT
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uses SERIAL_CPU_INIT
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uses ENABLE_APIC_EXT_ID
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uses ENABLE_APIC_EXT_ID
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@ -133,6 +141,18 @@ default ENABLE_APIC_EXT_ID=1
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default APIC_ID_OFFSET=0x10
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default APIC_ID_OFFSET=0x10
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default LIFT_BSP_APIC_ID=0
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default LIFT_BSP_APIC_ID=0
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#HT Unit ID offset
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#default HT_CHAIN_UNITID_BASE=0xa
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#real SB Unit ID
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#default HT_CHAIN_END_UNITID_BASE=0x6
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#make the SB HT chain on bus 0
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#default SB_HT_CHAIN_ON_BUS0=1
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#allow capable device use that above 4G
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#default CONFIG_PCI_64BIT_PREF_MEM=1
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##
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##
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## enable CACHE_AS_RAM specifics
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## enable CACHE_AS_RAM specifics
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##
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##
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@ -140,6 +160,8 @@ default USE_DCACHE_RAM=1
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default DCACHE_RAM_BASE=0xcc000
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default DCACHE_RAM_BASE=0xcc000
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default DCACHE_RAM_SIZE=0x4000
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default DCACHE_RAM_SIZE=0x4000
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default CONFIG_USE_INIT=0
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default CONFIG_USE_INIT=0
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#default CONFIG_USE_INIT=1
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#default CONFIG_USE_PRINTK_IN_CAR=1
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##
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##
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## Build code to setup a generic IOAPIC
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## Build code to setup a generic IOAPIC
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@ -248,6 +270,8 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
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#VGA
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#VGA
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default CONFIG_CONSOLE_VGA=1
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default CONFIG_CONSOLE_VGA=1
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default CONFIG_PCI_ROM_RUN=1
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default CONFIG_PCI_ROM_RUN=1
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#default CONFIG_CONSOLE_VGA=0
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#default CONFIG_PCI_ROM_RUN=0
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### End Options.lb
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### End Options.lb
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end
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end
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@ -0,0 +1,239 @@
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/*
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* Agami Aruma ACPI support
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*
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* written by Stefan Reinauer <stepan@coresystems.de>
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* (C) 2005 Stefan Reinauer
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* (C) 2007 coresystems GmbH
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/acpi.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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extern unsigned char AmlCode[];
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#define IO_APIC_ADDR 0xfec00000UL
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unsigned long acpi_fill_madt(unsigned long current)
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{
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unsigned int gsi_base=0x18, ioapic_nr=2, i;
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device_t dev=0;
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/* create all subtables for 4p */
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0); //SDE BSP APIC ID=0
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 17);
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 18);
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 19);
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/* Write 8111 IOAPIC */
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 1,
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IO_APIC_ADDR, 0);
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/* Write the first 8131 IOAPICs */
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for(i = 0; i < 2; i++) {
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if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev)){
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ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
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ioapic_nr++;
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}
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}
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/* Write the 8132 IOAPICs if they exist */
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for(i = 0; i < 4; i++) {
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if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7459, dev)){
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ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
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ioapic_nr++;
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}
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}
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/* in the event there were no 8132s reset dev and look for the 8131s */
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/* first skip the onboard 8131 */
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dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, 0);
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dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev);
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/* Write all 8131 IOAPICs */
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while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev))) {
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ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
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ioapic_nr++;
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}
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current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
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current, 1, 0, 2, 0 );
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current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
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current, 1, 0, 2, 0 );
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return current;
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}
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/* The next two tables are used by our DSDT and are freely defined
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* here. This construct is used because the bus numbers containing
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* the 8131 bridges may vary so that we need to pass LinuxBIOS
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* knowledge into the DSDT
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||||||
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*/
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typedef struct lnxc_busses {
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u8 secondary;
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u8 subordinate;
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} acpi_lnxb_busses_t;
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||||||
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||||||
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typedef struct acpi_lnxb {
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struct acpi_table_header header;
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acpi_lnxb_busses_t busses[5];
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} acpi_lnxb_t;
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||||||
|
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||||||
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/* special linuxbios acpi table */
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||||||
|
void acpi_create_lnxb(acpi_lnxb_t *lnxb)
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||||||
|
{
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||||||
|
device_t dev;
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||||||
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int busidx=0;
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||||||
|
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||||||
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acpi_header_t *header=&(lnxb->header);
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||||||
|
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||||||
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/* fill out header fields */
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||||||
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memcpy(header->signature, "LNXB", 4);
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||||||
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memcpy(header->oem_id, OEM_ID, 6);
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||||||
|
memcpy(header->oem_table_id, "LNXBIOS ", 8);
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||||||
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memcpy(header->asl_compiler_id, ASLC, 4);
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||||||
|
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||||||
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header->length = sizeof(acpi_lnxb_t);
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||||||
|
header->revision = 1;
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||||||
|
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||||||
|
/*
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||||||
|
* Write external 8131 bus ranges
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||||||
|
*/
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||||||
|
/* first skip the onboard 8131 */
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||||||
|
dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
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||||||
|
dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
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||||||
|
/* now look at the last 8131 in each chain,
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||||||
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* as it contains the valid bus ranges
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||||||
|
*/
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||||||
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/* Add a check for 8132 devices, device ID == 0x7458 */
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||||||
|
while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7458, dev))
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|
&& busidx<5 ) {
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||||||
|
int subu, fn, slot;
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acpi_lnxb_busses_t *busses;
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||||||
|
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||||||
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if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
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||||||
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continue;
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||||||
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||||||
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busses=&(lnxb->busses[busidx]);
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||||||
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lnxb->busses[busidx].secondary = dev->bus->secondary;
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||||||
|
lnxb->busses[busidx].subordinate =
|
||||||
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pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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||||||
|
#if 0
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||||||
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/* SDE-test print out lnbx table values */
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||||||
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printk_info("ACPI: 7458 lnxb value, secondary %lx, subordinate %1x \n",
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lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
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||||||
|
#endif
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||||||
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busidx++;
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||||||
|
}
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||||||
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dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
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||||||
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dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
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||||||
|
while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev))
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||||||
|
&& busidx<5 ) {
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||||||
|
int subu, fn, slot;
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acpi_lnxb_busses_t *busses;
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||||||
|
|
||||||
|
if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
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||||||
|
continue;
|
||||||
|
|
||||||
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busses=&(lnxb->busses[busidx]);
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||||||
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lnxb->busses[busidx].secondary = dev->bus->secondary;
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||||||
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lnxb->busses[busidx].subordinate =
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||||||
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pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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||||||
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#if 0
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||||||
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/* SDE-test print out lnbx table values */
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||||||
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printk_info("ACPI: 7450 lnxb value, secondary %lx, subordinate %1x \n",
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||||||
|
lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
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||||||
|
#endif
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||||||
|
busidx++;
|
||||||
|
}
|
||||||
|
header->checksum = acpi_checksum((void *)lnxb, sizeof(acpi_lnxb_t));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
unsigned long write_acpi_tables(unsigned long start)
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||||||
|
{
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||||||
|
unsigned long current;
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||||||
|
acpi_rsdp_t *rsdp;
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||||||
|
acpi_rsdt_t *rsdt;
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||||||
|
acpi_hpet_t *hpet;
|
||||||
|
acpi_madt_t *madt;
|
||||||
|
acpi_fadt_t *fadt;
|
||||||
|
acpi_facs_t *facs;
|
||||||
|
acpi_lnxb_t *lnxb;
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||||||
|
acpi_header_t *dsdt;
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||||||
|
|
||||||
|
/* Align ACPI tables to 16byte */
|
||||||
|
start = ( start + 0x0f ) & -0x10;
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||||||
|
current = start;
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||||||
|
|
||||||
|
printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
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||||||
|
|
||||||
|
/* We need at least an RSDP and an RSDT Table */
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||||||
|
rsdp = (acpi_rsdp_t *) current;
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||||||
|
current += sizeof(acpi_rsdp_t);
|
||||||
|
rsdt = (acpi_rsdt_t *) current;
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||||||
|
current += sizeof(acpi_rsdt_t);
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||||||
|
|
||||||
|
/* clear all table memory */
|
||||||
|
memset((void *)start, 0, current - start);
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||||||
|
|
||||||
|
acpi_write_rsdp(rsdp, rsdt);
|
||||||
|
acpi_write_rsdt(rsdt);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We explicitly add these tables later on:
|
||||||
|
*/
|
||||||
|
printk_debug("ACPI: * HPET\n");
|
||||||
|
|
||||||
|
hpet = (acpi_hpet_t *) current;
|
||||||
|
current += sizeof(acpi_hpet_t);
|
||||||
|
acpi_create_hpet(hpet);
|
||||||
|
acpi_add_table(rsdt,hpet);
|
||||||
|
|
||||||
|
/* If we want to use HPET Timers Linux wants an MADT */
|
||||||
|
printk_debug("ACPI: * MADT\n");
|
||||||
|
|
||||||
|
madt = (acpi_madt_t *) current;
|
||||||
|
acpi_create_madt(madt);
|
||||||
|
current+=madt->header.length;
|
||||||
|
acpi_add_table(rsdt,madt);
|
||||||
|
|
||||||
|
printk_debug("ACPI: * LNXB\n");
|
||||||
|
lnxb=(acpi_lnxb_t *)current;
|
||||||
|
current += sizeof(acpi_facs_t);
|
||||||
|
acpi_create_lnxb(lnxb);
|
||||||
|
|
||||||
|
printk_debug("ACPI: * FACS\n");
|
||||||
|
facs = (acpi_facs_t *) current;
|
||||||
|
current += sizeof(acpi_facs_t);
|
||||||
|
acpi_create_facs(facs);
|
||||||
|
|
||||||
|
dsdt = (acpi_header_t *)current;
|
||||||
|
current += ((acpi_header_t *)AmlCode)->length;
|
||||||
|
memcpy((void *)dsdt,(void *)AmlCode, \
|
||||||
|
((acpi_header_t *)AmlCode)->length);
|
||||||
|
|
||||||
|
/* fix up dsdt */
|
||||||
|
((u32 *)dsdt)[11]=((u32)lnxb)+sizeof(acpi_header_t);
|
||||||
|
|
||||||
|
/* recalculate checksum */
|
||||||
|
dsdt->checksum = 0;
|
||||||
|
dsdt->checksum = acpi_checksum(dsdt,dsdt->length);
|
||||||
|
printk_debug("ACPI: * DSDT @ %08x Length %x\n",dsdt,dsdt->length);
|
||||||
|
printk_debug("ACPI: * FADT\n");
|
||||||
|
|
||||||
|
fadt = (acpi_fadt_t *) current;
|
||||||
|
current += sizeof(acpi_fadt_t);
|
||||||
|
|
||||||
|
acpi_create_fadt(fadt,facs,dsdt);
|
||||||
|
acpi_add_table(rsdt,fadt);
|
||||||
|
|
||||||
|
printk_info("ACPI: done.\n");
|
||||||
|
return current;
|
||||||
|
}
|
||||||
|
|
|
@ -55,13 +55,16 @@ static void hard_reset(void)
|
||||||
{
|
{
|
||||||
set_bios_reset();
|
set_bios_reset();
|
||||||
pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
|
pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
|
||||||
outb(0x0e, 0x0cf9);
|
//outb(0x0e, 0x0cf9);
|
||||||
|
outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
|
||||||
}
|
}
|
||||||
|
|
||||||
static void soft_reset(void)
|
static void soft_reset(void)
|
||||||
{
|
{
|
||||||
set_bios_reset();
|
set_bios_reset();
|
||||||
pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
|
pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
|
||||||
|
//outb(0x0e, 0x0cf9);
|
||||||
|
outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,155 +0,0 @@
|
||||||
Index: src/config/Options.lb
|
|
||||||
===================================================================
|
|
||||||
RCS file: /cvsroot/freebios/freebios2/src/config/Options.lb,v
|
|
||||||
retrieving revision 1.56
|
|
||||||
diff -u -r1.56 Options.lb
|
|
||||||
--- src/config/Options.lb 14 Jan 2005 21:54:16 -0000 1.56
|
|
||||||
+++ src/config/Options.lb 26 Jan 2005 09:50:04 -0000
|
|
||||||
@@ -815,3 +815,13 @@
|
|
||||||
export never
|
|
||||||
comment "Configure briQ with PowerPC G4"
|
|
||||||
end
|
|
||||||
+###############################################
|
|
||||||
+# Options for amd k8
|
|
||||||
+###############################################
|
|
||||||
+define ALLOW_HT_OVERCLOCKING
|
|
||||||
+ default 0
|
|
||||||
+ export always
|
|
||||||
+ comment "Allow K8 and AMD8131 to operate at maximum speed"
|
|
||||||
+end
|
|
||||||
+
|
|
||||||
+
|
|
||||||
Index: src/devices/hypertransport.c
|
|
||||||
===================================================================
|
|
||||||
RCS file: /cvsroot/freebios/freebios2/src/devices/hypertransport.c,v
|
|
||||||
retrieving revision 1.12
|
|
||||||
diff -u -r1.12 hypertransport.c
|
|
||||||
--- src/devices/hypertransport.c 19 Jan 2005 01:19:37 -0000 1.12
|
|
||||||
+++ src/devices/hypertransport.c 26 Jan 2005 09:50:04 -0000
|
|
||||||
@@ -7,6 +7,9 @@
|
|
||||||
#include <device/hypertransport.h>
|
|
||||||
#include <part/hard_reset.h>
|
|
||||||
#include <part/fallback_boot.h>
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+#include <pc80/mc146818rtc.h>
|
|
||||||
+#endif
|
|
||||||
|
|
||||||
static device_t ht_scan_get_devs(device_t *old_devices)
|
|
||||||
{
|
|
||||||
@@ -29,6 +32,9 @@
|
|
||||||
{
|
|
||||||
/* Handle bugs in valid hypertransport frequency reporting */
|
|
||||||
unsigned freq_cap;
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ int on;
|
|
||||||
+#endif
|
|
||||||
|
|
||||||
freq_cap = pci_read_config16(dev, pos);
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
|
|
||||||
@@ -36,7 +42,12 @@
|
|
||||||
/* AMD 8131 Errata 48 */
|
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
|
||||||
(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ on=0; get_option(&on, "amd8131_800MHz");
|
|
||||||
+ if(!on) freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#else
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
/* AMD 8151 Errata 23 */
|
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
|
||||||
@@ -45,7 +56,12 @@
|
|
||||||
}
|
|
||||||
/* AMD K8 Unsupported 1Ghz? */
|
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ on=0; get_option(&on, "amdk8_1GHz");
|
|
||||||
+ if(!on) freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#else
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
return freq_cap;
|
|
||||||
}
|
|
||||||
Index: src/northbridge/amd/amdk8/coherent_ht.c
|
|
||||||
===================================================================
|
|
||||||
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/coherent_ht.c,v
|
|
||||||
retrieving revision 1.40
|
|
||||||
diff -u -r1.40 coherent_ht.c
|
|
||||||
--- src/northbridge/amd/amdk8/coherent_ht.c 7 Jan 2005 21:12:05 -0000 1.40
|
|
||||||
+++ src/northbridge/amd/amdk8/coherent_ht.c 26 Jan 2005 09:50:04 -0000
|
|
||||||
@@ -266,7 +266,13 @@
|
|
||||||
|
|
||||||
/* AMD 8131 Errata 48 */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
|
|
||||||
- freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ if(!read_option(CMOS_VSTART_amd8131_800MHz,
|
|
||||||
+ CMOS_VLEN_amd8131_800MHz, 0))
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#else
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
/* AMD 8151 Errata 23 */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
|
|
||||||
@@ -274,7 +280,13 @@
|
|
||||||
}
|
|
||||||
/* AMD K8 Unsupported 1Ghz? */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
|
|
||||||
- freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ if(!read_option(CMOS_VSTART_amdk8_1GHz,
|
|
||||||
+ CMOS_VLEN_amdk8_1GHz, 0))
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#else
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
return freq_cap;
|
|
||||||
}
|
|
||||||
Index: src/northbridge/amd/amdk8/incoherent_ht.c
|
|
||||||
===================================================================
|
|
||||||
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/incoherent_ht.c,v
|
|
||||||
retrieving revision 1.15
|
|
||||||
diff -u -r1.15 incoherent_ht.c
|
|
||||||
--- src/northbridge/amd/amdk8/incoherent_ht.c 20 Jan 2005 20:41:17 -0000 1.15
|
|
||||||
+++ src/northbridge/amd/amdk8/incoherent_ht.c 26 Jan 2005 09:50:04 -0000
|
|
||||||
@@ -1,6 +1,7 @@
|
|
||||||
/*
|
|
||||||
This should be done by Eric
|
|
||||||
- 2004.12 yhlu add multi ht chain dynamically support
|
|
||||||
+ 2004.12 yhlu add multi ht chain dynamically support
|
|
||||||
+ 2005.01 stepan add HT overclocking feature
|
|
||||||
*/
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
@@ -96,7 +97,13 @@
|
|
||||||
|
|
||||||
/* AMD 8131 Errata 48 */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ if(!read_option(CMOS_VSTART_amd8131_800MHz,
|
|
||||||
+ CMOS_VLEN_amd8131_800MHz, 0))
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#else
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
/* AMD 8151 Errata 23 */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
|
|
||||||
@@ -104,7 +111,13 @@
|
|
||||||
}
|
|
||||||
/* AMD K8 Unsupported 1Ghz? */
|
|
||||||
if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
|
|
||||||
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
|
|
||||||
+ if(!read_option(CMOS_VSTART_amdk8_1GHz,
|
|
||||||
+ CMOS_VLEN_amdk8_1GHz, 0))
|
|
||||||
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#else
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
|
||||||
+#endif
|
|
||||||
}
|
|
||||||
return freq_cap;
|
|
||||||
}
|
|
|
@ -257,6 +257,12 @@ static void setup_aruma_resource_map(void)
|
||||||
PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x0b050213, // CPU1 LDT2
|
PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x0b050213, // CPU1 LDT2
|
||||||
PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x100c0223, // CPU2 LDT2
|
PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x100c0223, // CPU2 LDT2
|
||||||
PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x15110133, // CPU3 LTD1
|
PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x15110133, // CPU3 LTD1
|
||||||
|
|
||||||
|
/* setup power management registers */
|
||||||
|
PCI_ADDR(0, 0x18, 3, 0x80), 0x80808080, 0x23070000, // PM control low
|
||||||
|
PCI_ADDR(0, 0x18, 3, 0x84), 0x80808080, 0x00132113, // PM control high
|
||||||
|
PCI_ADDR(0, 0x18, 3, 0xD8), 0x8E000000, 0x20002710, // Clock PM high
|
||||||
|
|
||||||
};
|
};
|
||||||
int max;
|
int max;
|
||||||
max = sizeof(register_values)/sizeof(register_values[0]);
|
max = sizeof(register_values)/sizeof(register_values[0]);
|
||||||
|
|
|
@ -12,7 +12,7 @@ option MAXIMUM_CONSOLE_LOGLEVEL=8
|
||||||
romimage "normal"
|
romimage "normal"
|
||||||
option ROM_SIZE = 512*1024-36*1024
|
option ROM_SIZE = 512*1024-36*1024
|
||||||
option USE_FALLBACK_IMAGE=0
|
option USE_FALLBACK_IMAGE=0
|
||||||
option ROM_IMAGE_SIZE=0x14000
|
option ROM_IMAGE_SIZE=0x16000
|
||||||
option XIP_ROM_SIZE=0x20000
|
option XIP_ROM_SIZE=0x20000
|
||||||
option LINUXBIOS_EXTRA_VERSION=".0-normal"
|
option LINUXBIOS_EXTRA_VERSION=".0-normal"
|
||||||
payload ../../../../../../filo.elf
|
payload ../../../../../../filo.elf
|
||||||
|
@ -20,7 +20,7 @@ end
|
||||||
|
|
||||||
romimage "fallback"
|
romimage "fallback"
|
||||||
option USE_FALLBACK_IMAGE=1
|
option USE_FALLBACK_IMAGE=1
|
||||||
option ROM_IMAGE_SIZE=0x14000
|
option ROM_IMAGE_SIZE=0x16000
|
||||||
option XIP_ROM_SIZE=0x20000
|
option XIP_ROM_SIZE=0x20000
|
||||||
option LINUXBIOS_EXTRA_VERSION=".0-fallback"
|
option LINUXBIOS_EXTRA_VERSION=".0-fallback"
|
||||||
payload ../../../../../../filo.elf
|
payload ../../../../../../filo.elf
|
||||||
|
|
Loading…
Reference in New Issue