mainboard/google/puff: Enable pcie7 ep in dt
Missing bus init for RTL8111H ethernet chip hanging on bus. V.2: Include admendments from Kangheui. BRANCH=none BUG=b:146437819 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: I22aba312f183ea05eeb81d326ca0c05ce340a2e8 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37804 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -22,6 +22,8 @@ config BOARD_GOOGLE_BASEBOARD_HATCH
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select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
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select SOC_INTEL_COMETLAKE
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select SYSTEM_TYPE_LAPTOP
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select RT8168_GET_MAC_FROM_VPD if BOARD_GOOGLE_PUFF
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select RT8168_SET_LED_MODE if BOARD_GOOGLE_PUFF
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if BOARD_GOOGLE_BASEBOARD_HATCH
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@ -103,6 +103,13 @@ chip soc/intel/cannonlake
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},
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}"
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# PCIe port 7 for LAN
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register "PcieRpEnable[6]" = "1"
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register "PcieRpLtrEnable[6]" = "1"
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# Uses CLK SRC 0
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register "PcieClkSrcUsage[0]" = "6"
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register "PcieClkSrcClkReq[0]" = "0"
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# GPIO for SD card detect
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register "sdcard_cd_gpio" = "vSD3_CD_B"
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@ -134,6 +141,7 @@ chip soc/intel/cannonlake
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end
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end #I2C #4
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device pci 1a.0 on end # eMMC
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device pci 1c.6 on end # PCI Express Port 7, RTL8111H Ethernet NIC.
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device pci 1e.3 off end # GSPI #1
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end
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