sb/intel: Factor out ICH ACPI for HDA

Files are identical between all three southbridges, and differ for PCH.

Change-Id: Ic6a926af675bda3db3a5795df9e8f490caf3ebf4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43156
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-07-07 01:29:40 +02:00
parent ba045653dc
commit b6427b0b18
6 changed files with 3 additions and 35 deletions

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@ -148,7 +148,7 @@ Scope(\)
} }
// 0:1b.0 High Definition Audio (Azalia) // 0:1b.0 High Definition Audio (Azalia)
#include "audio.asl" #include <southbridge/intel/common/acpi/audio_ich.asl>
// PCI Express Ports // PCI Express Ports
#include <southbridge/intel/common/acpi/pcie.asl> #include <southbridge/intel/common/acpi/pcie.asl>

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@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
Device (HDEF)
{
Name (_ADR, 0x001b0000)
// Power Resources for Wake
Name (_PRW, Package(){
5, // Bit 5 of GPE
4 // Can wake from S4 state.
})
}

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@ -151,7 +151,7 @@ Scope(\)
} }
// 0:1b.0 High Definition Audio (Azalia) // 0:1b.0 High Definition Audio (Azalia)
#include "audio.asl" #include <southbridge/intel/common/acpi/audio_ich.asl>
// PCI Express Ports // PCI Express Ports
#include <southbridge/intel/common/acpi/pcie.asl> #include <southbridge/intel/common/acpi/pcie.asl>

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@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
Device (HDEF)
{
Name (_ADR, 0x001b0000)
// Power Resources for Wake
Name (_PRW, Package(){
5, // Bit 5 of GPE
4 // Can wake from S4 state.
})
}

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@ -152,7 +152,7 @@ Scope(\)
} }
// 0:1b.0 High Definition Audio (Azalia) // 0:1b.0 High Definition Audio (Azalia)
#include "audio.asl" #include <southbridge/intel/common/acpi/audio_ich.asl>
// PCI Express Ports // PCI Express Ports
#include <southbridge/intel/common/acpi/pcie.asl> #include <southbridge/intel/common/acpi/pcie.asl>