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mainboard/hp/pavilion_m6_1035dx: Remove HUDSON_LEGACY_FREE 

The Embedded Controller sits behind the LPC bridge and so needs
LPC decodes to be enabled.

Remove the LPC decode enable out of agesawrapper.c. The enable
is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)'
which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3
LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.

Change-Id: Ia487d21faa0fceb2557dbce14ef8822116fada91
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7628
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Edward O'Callaghan 2014-12-02 21:04:13 +11:00
parent 29635415a6
commit b6435610f5
2 changed files with 0 additions and 8 deletions
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4
src/mainboard/hp/pavilion_m6_1035dx/Kconfig
View File

@ -69,8 +69,4 @@ config VGA_BIOS_ID
string
default "1002,9900"
config HUDSON_LEGACY_FREE
bool
default y
endif # BOARD_HP_PAVILION_M6_1035DX

4
src/mainboard/hp/pavilion_m6_1035dx/romstage.c
View File

@ -40,10 +40,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
agesawrapper_amdinitmmio();
/* Set LPC decode enables. */
pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
pci_write_config32(dev, 0x44, 0xff03ffd5);
hudson_lpc_port80();
if (!cpu_init_detectedx && boot_cpu()) {