soc/intel/apollolake: Enable DPTF & SMBus as it is a required device

coreboot is unable to disable certain devices, whilst many are hidden
DPTF and SMBus are not. Set this to enabled chipset so that it is
enabled by default.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I85d74179b6fe3c6126566422f82f7b806f80d0c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Sean Rhodes 2022-07-27 15:23:37 +01:00 committed by Tim Wawrzynczak
parent acb4d72fff
commit b660f4ee47
2 changed files with 3 additions and 3 deletions

View File

@ -1,7 +1,7 @@
chip soc/intel/apollolake
device domain 0 on
device pci 00.0 alias system_agent on end # Host Bridge
device pci 00.1 alias dptf off end # DPTF
device pci 00.1 alias dptf on end # DPTF
device pci 00.2 alias npk off end # NorthPeak
device pci 02.0 alias igd off end # Integrated Graphics Device
device pci 03.0 alias iunit off end # iUnit

View File

@ -1,7 +1,7 @@
chip soc/intel/apollolake
device domain 0 on
device pci 00.0 alias system_agent on end # Host Bridge
device pci 00.1 alias dptf off end # DPTF
device pci 00.1 alias dptf on end # DPTF
device pci 00.2 alias npk off end # NorthPeak
device pci 02.0 alias igd off end # Integrated Graphics Device
device pci 03.0 alias gmm off end # GMM
@ -44,6 +44,6 @@ chip soc/intel/apollolake
device pci 1d.0 alias ufs off end # UFS
device pci 1e.0 alias sdio off end # SDIO
device pci 1f.0 alias lpc_espi on end # LPC
device pci 1f.1 alias smbus off end # SMBUS
device pci 1f.1 alias smbus on end # SMBUS
end
end