amd/mct/ddr3: Correctly configure CsMux67
The existing logic to set up CsMux67 used an incorrect mask
and comparison value due to a copy + paste editing error.
Use the correct mask and comparison value for the last two
values.
Commit cf1cb5b2d4
did the same
for CsMux45 but missed this one.
Change-Id: Ib97ca89535b8291397d42eca69e217c21a9dd937
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/25994
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
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@ -58,7 +58,7 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
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if (((((f2x80 >> 4) & 0xf) == 0x7) || (((f2x80 >> 4) & 0xf) == 0x9))
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if (((((f2x80 >> 4) & 0xf) == 0x7) || (((f2x80 >> 4) & 0xf) == 0x9))
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&& ((f2x64 & 0x3) == 0x3))
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&& ((f2x64 & 0x3) == 0x3))
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cs_mux_67 = 1;
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cs_mux_67 = 1;
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else if (((((f2x80 >> 4) & 0xa) == 0x7) || (((f2x80 >> 4) & 0xb) == 0x9))
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else if (((((f2x80 >> 4) & 0xf) == 0xa) || (((f2x80 >> 4) & 0xf) == 0xb))
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&& ((f2x64 & 0x3) > 0x1))
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&& ((f2x64 & 0x3) > 0x1))
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cs_mux_67 = 1;
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cs_mux_67 = 1;
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else
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else
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