diff --git a/src/mainboard/google/brya/variants/anraggar/gpio.c b/src/mainboard/google/brya/variants/anraggar/gpio.c
index 6eac21a7a1..cdbb72fdaf 100644
--- a/src/mainboard/google/brya/variants/anraggar/gpio.c
+++ b/src/mainboard/google/brya/variants/anraggar/gpio.c
@@ -9,6 +9,8 @@
 static const struct pad_config override_gpio_table[] = {
 	/* A7  : NC ==> LTE_Present */
 	PAD_CFG_GPI(GPP_A7, NONE, DEEP),
+	/* A8  : GPP_A8 ==> WWAN_RF_DISABLE_ODL */
+	PAD_CFG_GPO(GPP_A8, 1, DEEP),
 	/* A18 : NC ==> HDMI_HPD_SRC*/
 	PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
 
@@ -80,8 +82,8 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_GPO(GPP_F11, 1, DEEP),
 	/* F12 : GSXDOUT ==> WWAN_RST_L */
 	PAD_CFG_GPO(GPP_F12, 0, DEEP),
-	/* F16 : NC ==> WWAN_PWR_ENABLE */
-	PAD_CFG_GPO(GPP_F16, 1, DEEP),
+	/* D6 : NC ==> WWAN_PWR_ENABLE */
+	PAD_CFG_GPO(GPP_D6, 1, DEEP),
 
 	/* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
 	PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
index 16da214332..defb8e6bba 100644
--- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
@@ -409,7 +409,8 @@ chip soc/intel/alderlake
 				[3] = USB2_PORT_MID(OC_SKIP),		/* Type-A DB (6.2 inch) */
 				[4] = USB2_PORT_SHORT(OC_SKIP),	/* LTE (3.3 inch) */
 				[5] = USB2_PORT_SHORT(OC_SKIP),	/* UFC (3.7 inch) */
-				[7] = USB2_PORT_SHORT(OC_SKIP),	/* BT  (2.5 inch) */
+				[7] = USB2_PORT_SHORT(OC_SKIP),	/* Bluetooth port for PCIe WLAN (2.5 inch) */
+				[9] = USB2_PORT_SHORT(OC_SKIP),	/* Bluetooth port for CNVi WLAN */
 			}"
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
@@ -452,11 +453,17 @@ chip soc/intel/alderlake
 						device ref usb2_port6 on end
 					end
 					chip drivers/usb/acpi
-						register "desc" = ""USB2 Bluetooth""
+						register "desc" = ""PCIe Bluetooth""
 						register "type" = "UPC_TYPE_INTERNAL"
 						register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
 						device ref usb2_port8 on end
 					end
+					chip drivers/usb/acpi
+						register "desc" = ""CNVi Bluetooth""
+						register "type" = "UPC_TYPE_INTERNAL"
+						register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
+						device ref usb2_port10 on end
+					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-A Port A0 (MLB)""
 						register "type" = "UPC_TYPE_USB3_A"