ck804: obtain I/O APIC base address for ACPI MADT from allocator
Change-Id: I67192c8ae99e396ea4b17e03c658f31dbb5c1800 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3960 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -48,20 +48,22 @@ unsigned long acpi_fill_mcfg(unsigned long current)
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/* APIC */
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/* APIC */
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unsigned long acpi_fill_madt(unsigned long current)
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unsigned long acpi_fill_madt(unsigned long current)
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{
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{
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unsigned long apic_addr;
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device_t dev;
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device_t dev;
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struct resource *res;
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/* create all subtables for processors */
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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if (dev) {
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ASSERT(dev != NULL);
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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current += acpi_create_madt_ioapic(
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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(acpi_madt_ioapic_t *)current,
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ASSERT(res != NULL);
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CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS,
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apic_addr, 0);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
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CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS, res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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#if (!CONFIG_GENERATE_MP_TABLE)
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#error untested config
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#error untested config
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@ -69,7 +71,6 @@ unsigned long acpi_fill_madt(unsigned long current)
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x84, 0x0000007d);
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pci_write_config32(dev, 0x84, 0x0000007d);
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#endif
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#endif
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}
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/* IRQ of timer */
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/* IRQ of timer */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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@ -32,23 +32,26 @@ unsigned long acpi_fill_madt(unsigned long current)
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{
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{
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unsigned long apic_addr;
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unsigned long apic_addr;
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device_t dev;
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device_t dev;
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struct resource *res;
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/* create all subtables for processors */
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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if (dev) {
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ASSERT(dev != NULL);
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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#if (!CONFIG_GENERATE_MP_TABLE)
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x84, 0x0000007d);
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pci_write_config32(dev, 0x84, 0x0000007d);
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#endif
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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/* Write AMD 8131 two IOAPICs. */
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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@ -32,23 +32,26 @@ unsigned long acpi_fill_madt(unsigned long current)
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{
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{
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unsigned long apic_addr;
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unsigned long apic_addr;
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device_t dev;
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device_t dev;
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struct resource *res;
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/* create all subtables for processors */
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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if (dev) {
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ASSERT(dev != NULL);
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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#if (!CONFIG_GENERATE_MP_TABLE)
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x84, 0x0000007d);
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pci_write_config32(dev, 0x84, 0x0000007d);
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#endif
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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/* Write AMD 8131 two IOAPICs. */
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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@ -32,23 +32,26 @@ unsigned long acpi_fill_madt(unsigned long current)
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{
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{
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unsigned long apic_addr;
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unsigned long apic_addr;
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device_t dev;
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device_t dev;
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struct resource *res;
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/* create all subtables for processors */
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0));
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if (dev) {
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ASSERT(dev != NULL);
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
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apic_addr, 0);
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res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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#if (!CONFIG_GENERATE_MP_TABLE)
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x7c, 0x0120d218);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x80, 0x12008a00);
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pci_write_config32(dev, 0x84, 0x00080d7d);
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pci_write_config32(dev, 0x84, 0x00080d7d);
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#endif
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#endif
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}
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/* Write AMD 8131 two IOAPICs. */
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/* Write AMD 8131 two IOAPICs. */
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1));
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@ -67,17 +70,19 @@ unsigned long acpi_fill_madt(unsigned long current)
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/* Write second NVIDIA CK804 IOAPIC. */
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/* Write second NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x80, PCI_DEVFN(0x1, 0));
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dev = dev_find_slot(0x80, PCI_DEVFN(0x1, 0));
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if (dev) {
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ASSERT(dev != NULL);
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apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf;
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 7,
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 7,
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apic_addr, 0x20);
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res->base, 0x20);
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/* Initialize interrupt mapping if mptable.c didn't. */
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/* Initialize interrupt mapping if mptable.c didn't. */
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#if (!CONFIG_GENERATE_MP_TABLE)
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#if (!CONFIG_GENERATE_MP_TABLE)
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pci_write_config32(dev, 0x7c, 0x0000d218); // Why does the factory BIOS have 0?
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pci_write_config32(dev, 0x7c, 0x0000d218); // Why does the factory BIOS have 0?
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pci_write_config32(dev, 0x80, 0x00000000);
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pci_write_config32(dev, 0x80, 0x00000000);
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pci_write_config32(dev, 0x84, 0x00000d00); // Same here.
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pci_write_config32(dev, 0x84, 0x00000d00); // Same here.
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#endif
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#endif
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}
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/* IRQ9 */
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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