rambi: Move KBD_IRQ pin for Rambi 2.0 board
KBD_IRQ# is moved to GPIO SC101, with SC50 going back to its original SERIRQ function. Note that this change breaks Rambi 1.5 keyboard functionality. BUG=chrome-os-partner:24424 TEST=Manual on Rambi 2.0. Verify KB functions in OS with SC50 / SERIRQ KB interrupt toggling removed from EC code. BRANCH=Rambi, Glimmer, Clapper Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3fa40441741ea9d52a6e2ff15925570510b5b82b Reviewed-on: https://chromium-review.googlesource.com/181757 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5030 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -106,7 +106,7 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
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GPIO_FUNC1, /* S0-SC047 - PCLK_TPM */
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GPIO_FUNC1, /* S0-SC047 - PCLK_TPM */
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GPIO_FUNC1, /* S0-SC048 - CLK_PCI_EC */
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GPIO_FUNC1, /* S0-SC048 - CLK_PCI_EC */
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GPIO_FUNC1, /* S0-SC049 - LPC_CLKRUN_L */
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GPIO_FUNC1, /* S0-SC049 - LPC_CLKRUN_L */
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GPIO_DIRQ, /* S0-SC050 - IRQ_SERIRQ -- using for keyboard irq */
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GPIO_FUNC(1, PULL_UP, 10K), /* S0-SC050 - IRQ_SERIRQ */
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GPIO_NC, /* S0-SC051 - SMB_SOC_DATA (XDP) */
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GPIO_NC, /* S0-SC051 - SMB_SOC_DATA (XDP) */
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GPIO_NC, /* S0-SC052 - SMB_SOC_CLK (XDP) */
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GPIO_NC, /* S0-SC052 - SMB_SOC_CLK (XDP) */
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GPIO_NC, /* S0-SC053 - SMB_SOC_ALERTB (NC) */
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GPIO_NC, /* S0-SC053 - SMB_SOC_ALERTB (NC) */
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@ -157,7 +157,7 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
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GPIO_NC, /* S0-SC098 - NC */
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GPIO_NC, /* S0-SC098 - NC */
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GPIO_NC, /* S0-SC099 - NC */
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GPIO_NC, /* S0-SC099 - NC */
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GPIO_NC, /* S0-SC100 - NC */
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GPIO_NC, /* S0-SC100 - NC */
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GPIO_NC, /* S0-SC101 - NC*/
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GPIO_DIRQ, /* S0-SC101 - KBD_IRQ# */
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GPIO_END
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GPIO_END
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};
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};
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@ -53,4 +53,4 @@
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/* Corresponding SCORE GPIO pins */
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/* Corresponding SCORE GPIO pins */
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#define TPAD_IRQ_GPIO 55
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#define TPAD_IRQ_GPIO 55
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#define TOUCH_IRQ_GPIO 72
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#define TOUCH_IRQ_GPIO 72
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#define I8042_IRQ_GPIO 50
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#define I8042_IRQ_GPIO 101
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