mb/amd/gardenia,pademelon/mainboard: use ACPI_SCI_IRQ definition
Use the ACPI_SCI_IRQ definition for both the PIC and APIC IRQ number in the fch_irq_map table. Before the PIC mapping was set to PIRQ_NC, but both mb/google/kahlee and the other amd mainboards using newer SoCs set both the PIC and APCI IRQ number to ACPI_SCI_IRQ, so change this here to match the other mainboards. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I29dde7ca8d2ecf00d8174c2d793ef1ad55ae3e28 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73322 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -4,6 +4,7 @@
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/amd_pci_util.h>
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#include <gpio.h>
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#include <soc/acpi.h>
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#include <soc/southbridge.h>
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#include "gpio.h"
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@ -19,7 +20,7 @@ static const struct fch_irq_routing fch_irq_map[] = {
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{ PIRQ_F, 10, 21 },
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{ PIRQ_G, PIRQ_NC, 22 },
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{ PIRQ_H, PIRQ_NC, 23 },
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{ PIRQ_SCI, PIRQ_NC, 9 },
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{ PIRQ_SCI, ACPI_SCI_IRQ, ACPI_SCI_IRQ },
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{ PIRQ_SMBUS, PIRQ_NC, PIRQ_NC },
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{ PIRQ_HDA, 3, 16 },
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{ PIRQ_SD, PIRQ_NC, 16 },
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@ -4,6 +4,7 @@
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/amd_pci_util.h>
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#include <gpio.h>
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#include <soc/acpi.h>
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#include <soc/pci_devs.h>
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#include <soc/southbridge.h>
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@ -20,7 +21,7 @@ static const struct fch_irq_routing fch_irq_map[] = {
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{ PIRQ_F, 10, 21 },
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{ PIRQ_G, PIRQ_NC, 22 },
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{ PIRQ_H, PIRQ_NC, 23 },
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{ PIRQ_SCI, PIRQ_NC, 9 },
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{ PIRQ_SCI, ACPI_SCI_IRQ, ACPI_SCI_IRQ },
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{ PIRQ_SMBUS, PIRQ_NC, PIRQ_NC },
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{ PIRQ_HDA, 3, 16 },
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{ PIRQ_SD, PIRQ_NC, 16 },
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