nb/intel/haswell: Use cbmem_recovery()
For consistency with other nb/intel rename variable from wake_from_s3 to s3resume. Change-Id: If94509c4640f34f2783137ae1f94339e6e6cf971 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50971 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -47,7 +47,7 @@ void mainboard_romstage_entry(void)
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const struct northbridge_intel_haswell_config *cfg = config_of_soc();
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int wake_from_s3;
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int s3resume;
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struct pei_data pei_data = {
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.pei_version = PEI_VERSION,
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@ -76,7 +76,7 @@ void mainboard_romstage_entry(void)
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enable_lapic();
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wake_from_s3 = early_pch_init();
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s3resume = early_pch_init();
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/* Perform some early chipset initialization required
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* before RAM initialization can work
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@ -84,23 +84,23 @@ void mainboard_romstage_entry(void)
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haswell_early_initialization();
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printk(BIOS_DEBUG, "Back from haswell_early_initialization()\n");
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if (wake_from_s3) {
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if (s3resume) {
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#if CONFIG(HAVE_ACPI_RESUME)
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printk(BIOS_DEBUG, "Resume from S3 detected.\n");
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#else
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printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
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wake_from_s3 = 0;
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s3resume = 0;
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#endif
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}
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/* Prepare USB controller early in S3 resume */
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if (wake_from_s3)
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if (s3resume)
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enable_usb_bar();
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post_code(0x3a);
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/* MRC has hardcoded assumptions of 2 meaning S3 wake. Normalize it here. */
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pei_data.boot_mode = wake_from_s3 ? 2 : 0;
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pei_data.boot_mode = s3resume ? 2 : 0;
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/* Obtain the SPD addresses from mainboard code */
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mb_get_spd_map(pei_data.spd_addresses);
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@ -138,22 +138,23 @@ void mainboard_romstage_entry(void)
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intel_early_me_status();
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if (!wake_from_s3) {
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cbmem_initialize_empty();
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/* Save data returned from MRC on non-S3 resumes. */
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save_mrc_data(&pei_data);
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} else if (cbmem_initialize()) {
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#if CONFIG(HAVE_ACPI_RESUME)
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int cbmem_was_initted = !cbmem_recovery(s3resume);
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if (s3resume && !cbmem_was_initted) {
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/* Failed S3 resume, reset to come up cleanly */
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printk(BIOS_CRIT, "Failed to recover CBMEM in S3 resume.\n");
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system_reset();
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#endif
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}
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/* Save data returned from MRC on non-S3 resumes. */
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if (!s3resume)
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save_mrc_data(&pei_data);
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haswell_unhide_peg();
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setup_sdram_meminfo(&pei_data);
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romstage_handoff_init(wake_from_s3);
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romstage_handoff_init(s3resume);
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mb_late_romstage_setup();
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