mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change configures user facing camera related GPIOs as per schematics. 1. GPP_D5 pwr_en 2. GPP_B14 reset 3. GPP_E0 clock 4. GPP_D12 I2C4b 5. GPP_D13 I2C4b Signed-off-by: Pandya, Varshit B <varshit.b.pandya@intel.com> Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44416 Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -31,6 +31,9 @@ static const struct pad_config gpio_table[] = {
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/* PMC_PLT_RST_N */
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PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
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/* CAM1_RST_N */
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PAD_CFG_GPO(GPP_B14, 0, PLTRST),
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/* M.2_WLAN_PERST_N */
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PAD_CFG_GPO(GPP_B17, 1, PLTRST),
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@ -76,9 +79,18 @@ static const struct pad_config gpio_table[] = {
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/* CAM2_PWREN */
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PAD_CFG_GPO(GPP_D4, 0, PLTRST),
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/* CAM1_PWREN */
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PAD_CFG_GPO(GPP_D5, 0, PLTRST),
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/*LAN_RST_N*/
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PAD_CFG_GPO(GPP_D6, 1, PLTRST),
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/* I2C4B_SDA */
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PAD_CFG_NF(GPP_D12, NONE, DEEP, NF3),
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/* I2C4B_SCL */
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PAD_CFG_NF(GPP_D13, NONE, DEEP, NF3),
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/* AVS_I2S_MCLK */
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PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
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@ -97,6 +109,9 @@ static const struct pad_config gpio_table[] = {
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/* I2C5_SCL */
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PAD_CFG_NF(GPP_D23, NONE, PLTRST, NF1),
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/* IMGCLKOUT_0 */
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PAD_CFG_NF(GPP_E0, NONE, DEEP, NF2),
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/* IMGCLKOUT_1 */
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PAD_CFG_NF(GPP_E2, NONE, PLTRST, NF1),
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