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amd/soc/common: Update CPPC value 

The CPPC table value for UEFI BIOS has been changed. The code has been
merged to AGESA. We can get the value by dumping ACPI table. Then we
align the coreboot code with the new value.

BUG=b:190420984

Change-Id: I091ab3bbc5f94961f8b366a3fa00f50f5c9fa182
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Zheng Bao 2022-08-25 17:09:34 +08:00 committed by Felix Held
parent 360d31fc9a
commit b72c1103aa
1 changed files with 2 additions and 2 deletions
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4
src/soc/amd/common/block/acpi/cppc.c
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@ -32,13 +32,13 @@ static void cpu_init_cppc_config(struct cppc_config *config, u32 version)
config->entries[CPPC_COUNTER_WRAP] = CPPC_UNSUPPORTED;
config->entries[CPPC_REF_PERF_COUNTER] = CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
config->entries[CPPC_DELIVERED_PERF_COUNTER] = CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
config->entries[CPPC_PERF_LIMITED] = CPPC_REG_MSR(MSR_CPPC_STATUS, 1, 1);
config->entries[CPPC_PERF_LIMITED] = CPPC_REG_MSR(MSR_CPPC_STATUS, 0, 2);
config->entries[CPPC_ENABLE] = CPPC_REG_MSR(MSR_CPPC_ENABLE, 0, 1);
if (version < 2)
return;
config->entries[CPPC_AUTO_SELECT] = CPPC_UNSUPPORTED;
config->entries[CPPC_AUTO_SELECT] = CPPC_DWORD(1);
config->entries[CPPC_AUTO_ACTIVITY_WINDOW] = CPPC_UNSUPPORTED;
config->entries[CPPC_PERF_PREF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
config->entries[CPPC_REF_PERF] = CPPC_UNSUPPORTED;