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soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig 

The current Kconfig help text is confusing because it talks about
enabling the Kconfig for disabling a UPD for disabling power gating.

Rewrite and clarify the help text.

Change-Id: I9637c549db1ce29f259708f316852fc2ae9e7c38
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46302
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner 2020-10-12 20:03:59 +02:00
parent 63975f0e68
commit b73d2476dc
1 changed files with 8 additions and 4 deletions
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src/soc/intel/common/block/timer/Kconfig
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@ -8,7 +8,11 @@ config USE_LEGACY_8254_TIMER
default y if PAYLOAD_SEABIOS || VGA_ROM_RUN default y if PAYLOAD_SEABIOS || VGA_ROM_RUN
default n default n
help help
This sets the FSP UPD to enable Legacy 8254 clock gating. As per Setting this makes the Legacy 8254 Timer available by disabling
the FSP Integration guide Legacy 8254 timer clock gating UPD needs clock gating. This needs to be enabled in order to boot a legacy
to be disabled in order to boot SeaBIOS or run OpRom, BIOS or OS not supporting other timers like PM timer or TSC.
but should otherwise be enabled.
While SeaBIOS does not require this timer anymore, it is needed
when OpRoms are being used.
Disable this setting to save power, when the timer is not needed.