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rm unused file 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2293 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu 2006-05-04 00:48:49 +00:00
parent 608d4b2c44
commit b73fd56488
1 changed files with 0 additions and 111 deletions
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111
src/cpu/amd/car/clear_1m_ram.c
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@ -1,111 +0,0 @@
/* by yhlu 6.2005 */
/* be warned, this file will be used core 0/node 0 only */
static inline __attribute__((always_inline)) void clear_1m_ram(void)
{
__asm__ volatile (
/* disable cache */
"movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%%eax\n\t"
"movl %%eax, %%cr0\n\t"
/* enable caching for first 1M using variable mtrr */
"movl $0x200, %%ecx\n\t"
"xorl %%edx, %%edx\n\t"
"movl $(0 | 1), %%eax\n\t"
// "movl $(0 | MTRR_TYPE_WRCOMB), %%eax\n\t"
"wrmsr\n\t"
"movl $0x201, %%ecx\n\t"
"movl $0x0000000f, %%edx\n\t"
#if CONFIG_USE_INIT
"movl %%esi, %%eax\n\t"
#else
"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
#endif
"wrmsr\n\t"
/* clear the first 1M */
#if CONFIG_USE_INIT
"movl %%edi, %%ecx\n\t"
#else
"movl $((CONFIG_LB_MEM_TOPK<<10)>>2), %%ecx\n\t"
#endif
"xorl %%edi, %%edi\n\t"
"cld\n\t"
"xorl %%eax, %%eax\n\t"
"rep stosl\n\t"
/* disable cache */
"movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%%eax\n\t"
"movl %%eax, %%cr0\n\t"
/* enable caching for first 1M using variable mtrr */
"movl $0x200, %%ecx\n\t"
"xorl %%edx, %%edx\n\t"
"movl $(0 | 6), %%eax\n\t"
// "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t"
"wrmsr\n\t"
"movl $0x201, %%ecx\n\t"
"movl $0x0000000f, %%edx\n\t"
#if CONFIG_USE_INIT
"movl %%esi, %%eax\n\t"
#else
"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
#endif
"wrmsr\n\t"
/* enable cache */
"movl %%cr0, %%eax\n\t"
"andl $0x9fffffff,%%eax\n\t"
"movl %%eax, %%cr0\n\t"
"invd\n\t"
:
:
#if CONFIG_USE_INIT
"S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "D" ((CONFIG_LB_MEM_TOPK<<10)>>2)
#endif
);
}
/* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/
static inline __attribute__((always_inline)) void set_1m_ram(void)
{
__asm__ volatile (
/* disable cache */
"movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%%eax\n\t"
"movl %%eax, %%cr0\n\t"
/* enable caching for first 1M using variable mtrr */
"movl $0x200, %%ecx\n\t"
"xorl %%edx, %%edx\n\t"
"movl $(0 | 6), %%eax\n\t"
// "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t"
"wrmsr\n\t"
"movl $0x201, %%ecx\n\t"
"movl $0x0000000f, %%edx\n\t"
#if CONFIG_USE_INIT
"movl %%esi, %%eax\n\t"
#else
"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
#endif
"wrmsr\n\t"
/* enable cache */
"movl %%cr0, %%eax\n\t"
"andl $0x9fffffff,%%eax\n\t"
"movl %%eax, %%cr0\n\t"
// "invd\n\t" // Is the BSP done with mem init?
:
:
#if CONFIG_USE_INIT
"S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800)
#endif
);
}