soc/amd/stoneyridge: Select HAVE_CF9_RESET

Looks like some preparation is needed before reset. However, Picasso
also needs some special handling and still selects this option without
selecting HAVE_CF9_RESET_PREPARE. So, just add HAVE_CF9_RESET for now.

Change-Id: I0c6da9a43a28dbee916fd6bda9ae380ebd619edf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43388
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/stoneyridge/Kconfig

@@ -20,6 +20,7 @@ config CPU_SPECIFIC_OPTIONS
 	select GENERIC_GPIO_LIB
 	select GENERIC_UDELAY
 	select IOAPIC
+	select HAVE_CF9_RESET
 	select HAVE_USBDEBUG_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_SPI
 	select TSC_SYNC_LFENCE