soc/amd/stoneyridge/smihandler.c: Report pending wake event
There's a small window of opportunity when CPU is already in SMM but has not yet entered S3 for a wake event to happen, which would cause a failed S3 entry. Check for pending events at the very last moment possible, and if there are pending wake events report them. BUG=b:111100312 TEST=build and boot grunt. Change-Id: I9472fdf481897fcf9f4c669f6b1514ef479fce7a Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/28247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -122,7 +122,8 @@ static void disable_all_smi_status(void)
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static void sb_slp_typ_handler(void)
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{
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uint32_t pm1cnt, pci_ctrl;
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uint32_t pm1cnt, pci_ctrl, reg32;
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uint16_t reg16;
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uint8_t slp_typ, rst_ctrl;
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/* Figure out SLP_TYP */
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@ -171,6 +172,29 @@ static void sb_slp_typ_handler(void)
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rst_ctrl |= SLPTYPE_CONTROL_EN;
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pm_write8(PM_RST_CTRL1, rst_ctrl);
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/*
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* Before the final command, check if there's pending wake
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* event. Read enable first, so that reading the actual status
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* is as close as possible to entering S3. The idea is to
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* minimize the opportunity for a wake event to happen before
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* actually entering S3. If there's a pending wake event, log
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* it and continue normal path. S3 will fail and the wake event
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* becomes a SCI.
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*/
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if (IS_ENABLED(CONFIG_ELOG_GSMI)) {
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reg16 = inw(ACPI_PM1_EN) & inw(ACPI_PM1_STS);
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if (reg16)
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elog_add_extended_event(
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ELOG_SLEEP_PENDING_PM1_WAKE,
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(u32)reg16);
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reg32 = inl(ACPI_GPE0_EN) & inl(ACPI_GPE0_STS);
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if (reg32)
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elog_add_extended_event(
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ELOG_SLEEP_PENDING_GPE0_WAKE,
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reg32);
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} /* if (IS_ENABLED(CONFIG_ELOG_GSMI)) */
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/* Reissue Pm1 write */
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outl(pm1cnt | SLP_EN, pm_acpi_pm_cnt_blk());
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hlt();
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