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acpi_add_ssdt_pstates: Remove function. 

Nowhere in database p_state_num is set. So this whole function ends up
being a noop. Moreover the offsets used by it are wrong with any
optimizing iasl. Remove it in preparation of move to per-device ACPI.

Change-Id: I1f1f9743565aa8f0b8fca472ad4cb6d7542fcecb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7012
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Vladimir Serbinenko 2014-10-03 09:39:31 +02:00
parent af4d66edf8
commit b752e4f402
16 changed files with 0 additions and 133 deletions
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3
src/arch/x86/include/arch/acpi.h
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@ -573,9 +573,6 @@ void acpi_jump_to_wakeup(void *wakeup_addr);
int __attribute__((weak)) acpi_get_sleep_type(void);
#endif /* IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) */
/* northbridge/amd/amdfam10/amdfam10_acpi.c */
unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current);
/* cpu/intel/speedstep/acpi.c */
void generate_cpu_entries(void);

2
src/include/cpu/amd/amdfam10_sysconf.h
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@ -56,8 +56,6 @@ struct amdfam10_sysconf_t {
msr_t msr_pstate[NODE_NUMS * 5]; // quad cores all cores in one node should be the same, and p0,..p5
unsigned needs_update_pstate_msrs;
struct p_state_t p_state[NODE_NUMS * 5];
unsigned p_state_num;
unsigned bsp_apicid;
int enabled_apic_ext_id;

3
src/mainboard/advansus/a785e-i/acpi_tables.c
View File

@ -157,9 +157,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/amd/bimini_fam10/acpi_tables.c
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@ -182,9 +182,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
View File

@ -252,9 +252,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt, ssdt->length);
acpi_add_table(rsdp, ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different possition? We may have to copy,

3
src/mainboard/amd/tilapia_fam10/acpi_tables.c
View File

@ -176,9 +176,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/asus/m4a78-em/acpi_tables.c
View File

@ -150,9 +150,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/asus/m5a88-v/acpi_tables.c
View File

@ -157,9 +157,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/avalue/eax-785e/acpi_tables.c
View File

@ -157,9 +157,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/gigabyte/ma785gm/acpi_tables.c
View File

@ -151,9 +151,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/gigabyte/ma785gmt/acpi_tables.c
View File

@ -149,9 +149,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/gigabyte/ma78gm/acpi_tables.c
View File

@ -149,9 +149,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/jetway/pa78vm5/acpi_tables.c
View File

@ -150,9 +150,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

3
src/mainboard/supermicro/h8scm_fam10/acpi_tables.c
View File

@ -164,9 +164,6 @@ unsigned long write_acpi_tables(unsigned long start)
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp,ssdt);
printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
current = acpi_add_ssdt_pstates(rsdp, current);
#if CONFIG_ACPI_SSDTX_NUM >= 1
/* same htio, but different position? We may have to copy,

5
src/northbridge/amd/amdfam10/Makefile.inc
View File

@ -3,11 +3,6 @@ ramstage-y += misc_control.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr1.asl
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr2.asl
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr3.asl
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.asl
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.asl
ramstage-y += get_pci1234.c

87
src/northbridge/amd/amdfam10/acpi.c
View File

@ -290,90 +290,3 @@ void update_ssdtx(void *ssdtx, int i)
}
static void update_sspr(void *sspr, u32 nodeid, u32 cpuindex)
{
u8 *CPU;
u8 *CPUIN;
u8 *COREFREQ;
u8 *POWER;
u8 *TRANSITION_LAT;
u8 *BUSMASTER_LAT;
u8 *CONTROL;
u8 *STATUS;
unsigned offset = 0x94 - 0x7f;
int i;
CPU = sspr + 0x38;
CPUIN = sspr + 0x3a;
COREFREQ = sspr + 0x7f; //2 byte
POWER = sspr + 0x82; //3 bytes
TRANSITION_LAT = sspr + 0x87; //two bytes
BUSMASTER_LAT = sspr + 0x8a; //two bytes
CONTROL = sspr + 0x8d;
STATUS = sspr + 0x8f;
snprintf((char*)CPU, 3, "%02x", (char)cpuindex);
*CPUIN = (u8) cpuindex;
for(i=0;i<sysconf.p_state_num;i++) {
struct p_state_t *p_state = &sysconf.p_state[nodeid * 5 + i];
intx_to_stream(p_state->corefreq, 2, COREFREQ + i*offset);
intx_to_stream(p_state->power, 3, POWER + i*offset);
intx_to_stream(p_state->transition_lat, 2, TRANSITION_LAT + i*offset);
intx_to_stream(p_state->busmaster_lat, 2, BUSMASTER_LAT + i*offset);
*((u8 *)(CONTROL + i*offset)) =(u8) p_state->control;
*((u8 *)(STATUS + i*offset)) =(u8) p_state->status;
}
}
extern const unsigned char AmlCode_sspr5[];
extern const unsigned char AmlCode_sspr4[];
extern const unsigned char AmlCode_sspr3[];
extern const unsigned char AmlCode_sspr2[];
extern const unsigned char AmlCode_sspr1[];
/* fixme: find one good way for different p_state_num */
unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current)
{
device_t cpu;
int cpu_index = 0;
acpi_header_t *ssdt;
if(!sysconf.p_state_num) return current;
void *AmlCode_sspr;
switch(sysconf.p_state_num) {
case 1: AmlCode_sspr = &AmlCode_sspr1; break;
case 2: AmlCode_sspr = &AmlCode_sspr2; break;
case 3: AmlCode_sspr = &AmlCode_sspr3; break;
case 4: AmlCode_sspr = &AmlCode_sspr4; break;
default: AmlCode_sspr = &AmlCode_sspr5; break;
}
for(cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC) ||
(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
continue;
}
if (!cpu->enabled) {
continue;
}
printk(BIOS_DEBUG, "ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id);
current = ALIGN(current, 16);
ssdt = (acpi_header_t *)current;
memcpy(ssdt, AmlCode_sspr, sizeof(acpi_header_t));
current += ssdt->length;
memcpy(ssdt, AmlCode_sspr, ssdt->length);
update_sspr((void*)ssdt,cpu->path.apic.node_id, cpu_index);
/* recalculate checksum */
ssdt->checksum = 0;
ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
acpi_add_table(rsdp, ssdt);
cpu_index++;
}
return current;
}