soc/mediatek/mt8186: Reduce GPIO code size in bootblock
Create a new GPIO driving info table that contains only the pins used in the bootblock. The GPIO driving info table is downsized from 1480 bytes to 24 bytes. BUG=b:270911452 TEST=build pass Change-Id: I24775ba93cd74ae401747c2f5a26bbf1c8f6ac0a Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74062 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -34,7 +34,7 @@ enum gpio_drv_adv {
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};
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struct gpio_drv_info {
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uint32_t offset;
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uint8_t offset;
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uint8_t shift;
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uint8_t width;
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};
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@ -5,9 +5,34 @@
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* Chapter number: 5.1
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*/
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#include <assert.h>
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#include <device/mmio.h>
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#include <gpio.h>
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enum {
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SPI0_CLK_A = 0,
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SPI0_CSB_A = 1,
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SPI0_MO_A = 2,
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SPI0_MI_A = 3,
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TDM_RX_BCK = 4,
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TDM_RX_MCLK = 5,
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TDM_RX_DATA0 = 6,
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TDM_RX_DATA1 = 7,
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};
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static const struct gpio_drv_info bootblock_gpio_driving_info[] = {
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/* GPIO 36~39 */
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[SPI0_CLK_A] = { 0x0, 9, 3, },
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[SPI0_CSB_A] = { 0x0, 9, 3, },
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[SPI0_MO_A] = { 0x0, 12, 3, },
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[SPI0_MI_A] = { 0x0, 9, 3, },
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/* GPIO 61~64 */
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[TDM_RX_BCK] = { 0x0, 24, 3, },
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[TDM_RX_MCLK] = { 0x0, 24, 3, },
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[TDM_RX_DATA0] = { 0x0, 24, 3, },
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[TDM_RX_DATA1] = { 0x0, 27, 3, },
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};
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static const struct gpio_drv_info gpio_driving_info[] = {
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[0] = { 0x0, 27, 3, },
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[1] = { 0x0, 27, 3, },
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@ -253,6 +278,60 @@ void *gpio_find_reg_addr(gpio_t gpio)
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return reg_addr;
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}
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static const struct gpio_drv_info *get_gpio_driving_info(uint32_t raw_id)
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{
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if (ENV_BOOTBLOCK) {
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uint32_t id;
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switch (raw_id) {
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case GPIO_ID(SPI0_CLK):
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id = SPI0_CLK_A;
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break;
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case GPIO_ID(SPI0_CSB):
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id = SPI0_CSB_A;
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break;
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case GPIO_ID(SPI0_MO):
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id = SPI0_MO_A;
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break;
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case GPIO_ID(SPI0_MI):
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id = SPI0_MI_A;
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break;
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case GPIO_ID(TDM_RX_BCK):
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id = TDM_RX_BCK;
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break;
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case GPIO_ID(TDM_RX_MCLK):
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id = TDM_RX_MCLK;
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break;
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case GPIO_ID(TDM_RX_DATA0):
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id = TDM_RX_DATA0;
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break;
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case GPIO_ID(TDM_RX_DATA1):
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id = TDM_RX_DATA1;
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break;
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default:
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return NULL;
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}
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assert(id < ARRAY_SIZE(bootblock_gpio_driving_info));
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return &bootblock_gpio_driving_info[id];
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} else {
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if (raw_id >= ARRAY_SIZE(gpio_driving_info))
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return NULL;
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return &gpio_driving_info[raw_id];
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}
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}
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static const struct gpio_drv_info *get_gpio_driving_adv_info(uint32_t raw_id)
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{
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if (ENV_BOOTBLOCK) {
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return NULL;
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} else {
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if (raw_id >= ARRAY_SIZE(gpio_driving_adv_info))
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return NULL;
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return &gpio_driving_adv_info[raw_id];
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}
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}
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static inline bool is_valid_drv(uint8_t drv)
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{
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return drv <= GPIO_DRV_16_MA;
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@ -266,16 +345,16 @@ static inline bool is_valid_drv_adv(enum gpio_drv_adv drv)
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int gpio_set_driving(gpio_t gpio, uint8_t drv)
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{
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uint32_t mask;
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const struct gpio_drv_info *info = &gpio_driving_info[gpio.id];
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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void *reg, *reg_adv;
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const struct gpio_drv_info *info = get_gpio_driving_info(gpio.id);
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const struct gpio_drv_info *adv_info = get_gpio_driving_adv_info(gpio.id);
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void *reg, *reg_adv, *reg_addr;
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if (!info)
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return -1;
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if (!is_valid_drv(drv))
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return -1;
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reg = gpio_find_reg_addr(gpio) + info->offset;
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reg_adv = gpio_find_reg_addr(gpio) + adv_info->offset;
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if (info->width == 0)
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return -1;
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@ -284,20 +363,27 @@ int gpio_set_driving(gpio_t gpio, uint8_t drv)
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if ((uint32_t)drv > mask)
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return -1;
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reg_addr = gpio_find_reg_addr(gpio);
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reg = reg_addr + info->offset;
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clrsetbits32(reg, mask << info->shift, drv << info->shift);
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/* Disable EH if supported */
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if (adv_info->width != 0)
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if (adv_info && adv_info->width != 0) {
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reg_adv = reg_addr + adv_info->offset;
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clrbits32(reg_adv, BIT(adv_info->shift));
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}
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return 0;
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}
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int gpio_get_driving(gpio_t gpio)
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{
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const struct gpio_drv_info *info = &gpio_driving_info[gpio.id];
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const struct gpio_drv_info *info = get_gpio_driving_info(gpio.id);
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void *reg;
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if (!info)
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return -1;
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reg = gpio_find_reg_addr(gpio) + info->offset;
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if (info->width == 0)
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return -1;
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@ -308,9 +394,12 @@ int gpio_get_driving(gpio_t gpio)
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int gpio_set_driving_adv(gpio_t gpio, enum gpio_drv_adv drv)
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{
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uint32_t mask;
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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const struct gpio_drv_info *adv_info = get_gpio_driving_adv_info(gpio.id);
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void *reg_adv;
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if (!adv_info)
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return -1;
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if (!is_valid_drv_adv(drv))
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return -1;
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@ -334,10 +423,13 @@ int gpio_set_driving_adv(gpio_t gpio, enum gpio_drv_adv drv)
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int gpio_get_driving_adv(gpio_t gpio)
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{
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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const struct gpio_drv_info *adv_info = get_gpio_driving_adv_info(gpio.id);
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void *reg_adv;
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uint32_t drv;
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if (!adv_info)
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return -1;
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reg_adv = gpio_find_reg_addr(gpio) + adv_info->offset;
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if (adv_info->width == 0)
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return -1;
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@ -31,6 +31,8 @@ enum gpio_drv {
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GPIO_DRV_16_MA = 7,
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};
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#define GPIO_ID(name) PAD_##name##_ID
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#define PIN(id, name, flag, bit, base, offset, \
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func1, func2, func3, func4, func5, func6, func7) \
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PAD_##name##_ID = id, \
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