mb/google/dedede: Add new variant boten

Add initial support for boten variant board.

BUG=b:158023819
BRANCH=None
TEST=build

Change-Id: I56fe901c6aec781fac217ab08f7583cc25788688
Signed-off-by: peichao.wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Marco Chen <marcochen@google.com>
This commit is contained in:
Peichao Wang 2020-06-03 09:46:47 +08:00 committed by Karthik Ramasubramanian
parent 22aeed307d
commit b75d5743af
8 changed files with 79 additions and 0 deletions

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@ -55,6 +55,7 @@ config MAINBOARD_FAMILY
config MAINBOARD_PART_NUMBER
string
default "Boten" if BOARD_GOOGLE_BOTEN
default "Dedede" if BOARD_GOOGLE_DEDEDE
default "Drawcia" if BOARD_GOOGLE_DRAWCIA
default "Waddledoo" if BOARD_GOOGLE_WADDLEDOO
@ -79,6 +80,7 @@ config UART_FOR_CONSOLE
config VARIANT_DIR
string
default "boten" if BOARD_GOOGLE_BOTEN
default "dedede" if BOARD_GOOGLE_DEDEDE
default "drawcia" if BOARD_GOOGLE_DRAWCIA
default "waddledoo" if BOARD_GOOGLE_WADDLEDOO

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@ -1,3 +1,9 @@
config BOARD_GOOGLE_BOTEN
bool "Boten"
select BOARD_GOOGLE_BASEBOARD_DEDEDE
select BASEBOARD_DEDEDE_LAPTOP
select BOARD_ROMSIZE_KB_32768
config BOARD_GOOGLE_DEDEDE
bool "Dedede"
select BOARD_GOOGLE_BASEBOARD_DEDEDE

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,12 @@
/*
*
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

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@ -0,0 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE

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@ -0,0 +1,4 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)
K4U6E3S4AA-MGCR 0 (0000)
H9HCNNNBKMMLXR-NEE 0 (0000)

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@ -0,0 +1,3 @@
MT53E512M32D2NP-046 WT:E
K4U6E3S4AA-MGCR
H9HCNNNBKMMLXR-NEE

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@ -0,0 +1,39 @@
chip soc/intel/jasperlake
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
device domain 0 on end
end