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veyron: Activate Winbond SPI driver 

This patch activates the chip driver for Winbond SPI flash (which,
incidentally, looks 99.9% the same as the Gigadevice driver but still
requires some extra 500+ bytes of object code... there's definitely room
for improvement here). Shuffle around rk3288 memlayout to make a little
more room in the bootblock.

BRANCH=veyron
BUG=chrome-os-partner:34176
TEST=Booted Pinky. Checked bootblock and verstage memsz of final binary
and noticed that both only have less than 500 bytes left against their
memlayout boundary. The next piece of code we add will cause some
serious headaches...

Change-Id: I97ea6ac334104e4219e310afc557c164b2ff19d9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8769e5a34ad3cd417132646fbb58ff51c29fb640
Original-Change-Id: Id2f1204c30aa28251cf85cb80d7ca44947388dba
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/236977
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9719
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner 2014-12-19 12:41:16 -08:00 committed by Patrick Georgi
parent c14e42623b
commit b7641cc230
5 changed files with 7 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/veyron_jerry/Kconfig
View File

@ -37,6 +37,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select RETURN_FROM_VERSTAGE select RETURN_FROM_VERSTAGE
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_GIGADEVICE select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select VIRTUAL_DEV_SWITCH select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/google/veyron_mighty/Kconfig
View File

@ -37,6 +37,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select RETURN_FROM_VERSTAGE select RETURN_FROM_VERSTAGE
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_GIGADEVICE select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select VIRTUAL_DEV_SWITCH select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/google/veyron_pinky/Kconfig
View File

@ -37,6 +37,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select RETURN_FROM_VERSTAGE select RETURN_FROM_VERSTAGE
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_GIGADEVICE select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select VIRTUAL_DEV_SWITCH select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/google/veyron_speedy/Kconfig
View File

@ -37,6 +37,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select RETURN_FROM_VERSTAGE select RETURN_FROM_VERSTAGE
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_GIGADEVICE select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select VIRTUAL_DEV_SWITCH select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR config MAINBOARD_DIR

6
src/soc/rockchip/rk3288/include/soc/memlayout.ld
View File

@ -34,11 +34,11 @@ SECTIONS
SRAM_START(0xFF700000) SRAM_START(0xFF700000)
TTB(0xFF700000, 16K) TTB(0xFF700000, 16K)
BOOTBLOCK(0xFF704004, 17K - 4) BOOTBLOCK(0xFF704004, 18K - 4)
TTB_SUBTABLES(0xFF708400, 1K)
PRERAM_CBMEM_CONSOLE(0xFF708800, 4K) PRERAM_CBMEM_CONSOLE(0xFF708800, 4K)
VBOOT2_WORK(0xFF709800, 12K) VBOOT2_WORK(0xFF709800, 12K)
OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 42K) OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 41K)
TTB_SUBTABLES(0xFF716C00, 1K)
PRERAM_CBFS_CACHE(0xFF717000, 1K) PRERAM_CBFS_CACHE(0xFF717000, 1K)
STACK(0xFF717580, 3K - 0x180) STACK(0xFF717580, 3K - 0x180)
SRAM_END(0xFF718000) SRAM_END(0xFF718000)