mb/google/poppy/variants/nami: Update DPTF table
Update dptf.asl from tuning of the thermal team. BUG=b:72974136 TEST=Match the result from DPTF UI. Change-Id: I21ddc337359c3e11ad9756e61ba174b33dfc3c75 Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/26209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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@ -15,26 +15,31 @@
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#define DPTF_CPU_PASSIVE 98
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#define DPTF_CPU_PASSIVE 98
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#define DPTF_CPU_CRITICAL 125
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#define DPTF_CPU_CRITICAL 125
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#define DPTF_CPU_ACTIVE_AC0 71
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#define DPTF_CPU_ACTIVE_AC0 87
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#define DPTF_CPU_ACTIVE_AC1 69
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#define DPTF_CPU_ACTIVE_AC1 85
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#define DPTF_CPU_ACTIVE_AC2 67
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#define DPTF_CPU_ACTIVE_AC2 83
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#define DPTF_CPU_ACTIVE_AC3 65
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#define DPTF_CPU_ACTIVE_AC3 80
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#define DPTF_CPU_ACTIVE_AC4 60
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#define DPTF_CPU_ACTIVE_AC4 75
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#define DPTF_TSR0_SENSOR_ID 0
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#define DPTF_TSR0_SENSOR_ID 0
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#define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU"
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#define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU"
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#define DPTF_TSR0_PASSIVE 81
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#define DPTF_TSR0_PASSIVE 81
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#define DPTF_TSR0_CRITICAL 125
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#define DPTF_TSR0_CRITICAL 125
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#define DPTF_TSR0_ACTIVE_AC0 62
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#define DPTF_TSR0_ACTIVE_AC0 50
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#define DPTF_TSR0_ACTIVE_AC1 60
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#define DPTF_TSR0_ACTIVE_AC1 47
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#define DPTF_TSR0_ACTIVE_AC2 55
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#define DPTF_TSR0_ACTIVE_AC2 45
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#define DPTF_TSR0_ACTIVE_AC3 50
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#define DPTF_TSR0_ACTIVE_AC3 43
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#define DPTF_TSR0_ACTIVE_AC4 45
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#define DPTF_TSR0_ACTIVE_AC4 41
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#define DPTF_TSR1_SENSOR_ID 1
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#define DPTF_TSR1_SENSOR_ID 1
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#define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC"
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#define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC"
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#define DPTF_TSR1_PASSIVE 78
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#define DPTF_TSR1_PASSIVE 78
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#define DPTF_TSR1_CRITICAL 125
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#define DPTF_TSR1_CRITICAL 125
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#define DPTF_TSR1_ACTIVE_AC0 50
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#define DPTF_TSR1_ACTIVE_AC1 47
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#define DPTF_TSR1_ACTIVE_AC2 45
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#define DPTF_TSR1_ACTIVE_AC3 43
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#define DPTF_TSR1_ACTIVE_AC4 41
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#define DPTF_ENABLE_CHARGER
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#define DPTF_ENABLE_CHARGER
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#define DPTF_ENABLE_FAN_CONTROL
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#define DPTF_ENABLE_FAN_CONTROL
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@ -57,10 +62,10 @@ Name (DFPS, Package () {
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*/
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*/
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/* Control, Trip Point, Speed, NoiseLevel, Power */
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/* Control, Trip Point, Speed, NoiseLevel, Power */
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Package () {90, 0xFFFFFFFF, 6700, 220, 2200},
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Package () {90, 0xFFFFFFFF, 6700, 220, 2200},
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Package () {72, 0xFFFFFFFF, 5800, 180, 1800},
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Package () {69, 0xFFFFFFFF, 5800, 180, 1800},
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Package () {59, 0xFFFFFFFF, 5000, 145, 1450},
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Package () {52, 0xFFFFFFFF, 5000, 145, 1450},
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Package () {57, 0xFFFFFFFF, 4900, 115, 1150},
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Package () {46, 0xFFFFFFFF, 4900, 115, 1150},
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Package () {40, 0xFFFFFFFF, 3900, 90, 900}
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Package () {36, 0xFFFFFFFF, 3900, 90, 900}
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})
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})
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Name (DART, Package () {
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Name (DART, Package () {
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@ -71,15 +76,15 @@ Name (DART, Package () {
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* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
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* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
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* AC7, AC8, AC9
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* AC7, AC8, AC9
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*/
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*/
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\_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 90, 72, 59, 40, 0, 0,
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\_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 52, 46, 36, 0, 0,
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0, 0, 0
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0, 0, 0
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},
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},
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Package () {
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Package () {
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 100, 90, 72, 59, 40, 0, 0,
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 52, 46, 36, 0, 0,
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0, 0, 0
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0, 0, 0
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},
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},
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Package () {
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Package () {
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 100, 90, 72, 59, 40, 0, 0,
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 52, 46, 36, 0, 0,
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0, 0, 0
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0, 0, 0
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}
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}
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})
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})
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@ -111,7 +116,7 @@ Name (MPPC, Package ()
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Package () { /* Power Limit 2 */
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Package () { /* Power Limit 2 */
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1, /* PowerLimitIndex, 1 for Power Limit 2 */
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1, /* PowerLimitIndex, 1 for Power Limit 2 */
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15000, /* PowerLimitMinimum */
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15000, /* PowerLimitMinimum */
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25000, /* PowerLimitMaximum */
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44000, /* PowerLimitMaximum */
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28000, /* TimeWindowMinimum */
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28000, /* TimeWindowMinimum */
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32000, /* TimeWindowMaximum */
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32000, /* TimeWindowMaximum */
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100 /* StepSize */
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100 /* StepSize */
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