flashrom: Move all IT87xx specific SPI routines from spi.c to a separate
file it87spi.c. No behavioural changes, but greatly improved SPI abstraction. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
parent
03646bebbe
commit
b77fb6bd52
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@ -24,7 +24,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \
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sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
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sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
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w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
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w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
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sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
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sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
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flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o
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flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o
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all: pciutils dep $(PROGRAM)
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all: pciutils dep $(PROGRAM)
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@ -360,6 +360,11 @@ void spi_write_disable();
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int spi_chip_erase_c7(struct flashchip *flash);
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int spi_chip_erase_c7(struct flashchip *flash);
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int spi_chip_write(struct flashchip *flash, uint8_t *buf);
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int spi_chip_write(struct flashchip *flash, uint8_t *buf);
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int spi_chip_read(struct flashchip *flash, uint8_t *buf);
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int spi_chip_read(struct flashchip *flash, uint8_t *buf);
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uint8_t spi_read_status_register();
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void spi_disable_blockprotect(void);
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void spi_byte_program(int address, uint8_t byte);
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void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
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void spi_nbyte_read(int address, uint8_t *bytes, int len);
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/* 82802ab.c */
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/* 82802ab.c */
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int probe_82802ab(struct flashchip *flash);
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int probe_82802ab(struct flashchip *flash);
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@ -371,6 +376,13 @@ int probe_29f040b(struct flashchip *flash);
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int erase_29f040b(struct flashchip *flash);
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int erase_29f040b(struct flashchip *flash);
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int write_29f040b(struct flashchip *flash, uint8_t *buf);
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int write_29f040b(struct flashchip *flash, uint8_t *buf);
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/* it87spi.c */
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extern uint16_t it8716f_flashport;
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int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
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int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
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int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
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void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
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/* jedec.c */
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/* jedec.c */
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void toggle_ready_jedec(volatile uint8_t *dst);
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void toggle_ready_jedec(volatile uint8_t *dst);
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void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
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void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
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@ -0,0 +1,257 @@
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/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
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* Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Contains the ITE IT87* SPI specific routines
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*/
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#include <stdio.h>
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#include <pci/pci.h>
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#include <stdint.h>
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#include <string.h>
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#include "flash.h"
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#include "spi.h"
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#define ITE_SUPERIO_PORT1 0x2e
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#define ITE_SUPERIO_PORT2 0x4e
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uint16_t it8716f_flashport = 0;
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/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
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int fast_spi = 1;
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/* Generic Super I/O helper functions */
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uint8_t regval(uint16_t port, uint8_t reg)
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{
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outb(reg, port);
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return inb(port + 1);
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}
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void regwrite(uint16_t port, uint8_t reg, uint8_t val)
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{
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outb(reg, port);
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outb(val, port + 1);
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}
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/* Helper functions for most recent ITE IT87xx Super I/O chips */
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#define CHIP_ID_BYTE1_REG 0x20
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#define CHIP_ID_BYTE2_REG 0x21
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static void enter_conf_mode_ite(uint16_t port)
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{
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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if (port == ITE_SUPERIO_PORT1)
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outb(0x55, port);
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else
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outb(0xaa, port);
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}
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static void exit_conf_mode_ite(uint16_t port)
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{
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regwrite(port, 0x02, 0x02);
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}
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static uint16_t find_ite_spi_flash_port(uint16_t port)
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{
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uint8_t tmp = 0;
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uint16_t id, flashport = 0;
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enter_conf_mode_ite(port);
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id = regval(port, CHIP_ID_BYTE1_REG) << 8;
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id |= regval(port, CHIP_ID_BYTE2_REG);
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/* TODO: Handle more IT87xx if they support flash translation */
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if (id == 0x8716) {
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/* NOLDN, reg 0x24, mask out lowest bit (suspend) */
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tmp = regval(port, 0x24) & 0xFE;
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
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printf("LPC write to serial flash %sabled\n",
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(tmp & 1 << 4) ? "en" : "dis");
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printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
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/* LDN 0x7, reg 0x64/0x65 */
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regwrite(port, 0x07, 0x7);
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flashport = regval(port, 0x64) << 8;
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flashport |= regval(port, 0x65);
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}
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exit_conf_mode_ite(port);
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return flashport;
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}
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int it87xx_probe_spi_flash(const char *name)
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{
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it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
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if (!it8716f_flashport)
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it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
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return (!it8716f_flashport);
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}
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/* The IT8716F only supports commands with length 1,2,4,5 bytes including
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command byte and can not read more than 3 bytes from the device.
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This function expects writearr[0] to be the first byte sent to the device,
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whereas the IT8716F splits commands internally into address and non-address
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commands with the address in inverse wire order. That's why the register
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ordering in case 4 and 5 may seem strange. */
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int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
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{
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uint8_t busy, writeenc;
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int i;
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do {
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busy = inb(it8716f_flashport) & 0x80;
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} while (busy);
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if (readcnt > 3) {
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printf("%s called with unsupported readcnt %i.\n",
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__FUNCTION__, readcnt);
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return 1;
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}
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switch (writecnt) {
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case 1:
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outb(writearr[0], it8716f_flashport + 1);
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writeenc = 0x0;
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break;
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case 2:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 7);
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writeenc = 0x1;
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break;
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case 4:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 4);
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outb(writearr[2], it8716f_flashport + 3);
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outb(writearr[3], it8716f_flashport + 2);
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writeenc = 0x2;
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break;
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case 5:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 4);
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outb(writearr[2], it8716f_flashport + 3);
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outb(writearr[3], it8716f_flashport + 2);
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outb(writearr[4], it8716f_flashport + 7);
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writeenc = 0x3;
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break;
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default:
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printf("%s called with unsupported writecnt %i.\n",
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__FUNCTION__, writecnt);
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return 1;
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}
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/* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
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* Note:
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* We can't use writecnt directly, but have to use a strange encoding.
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*/
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outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
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if (readcnt > 0) {
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do {
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busy = inb(it8716f_flashport) & 0x80;
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} while (busy);
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for (i = 0; i < readcnt; i++) {
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readarr[i] = inb(it8716f_flashport + 5 + i);
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}
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}
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return 0;
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}
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/* Page size is usually 256 bytes */
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void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
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int i;
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spi_write_enable();
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outb(0x06 , it8716f_flashport + 1);
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outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
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for (i = 0; i < 256; i++) {
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bios[256 * block + i] = buf[256 * block + i];
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}
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outb(0, it8716f_flashport);
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 1-10 ms, so wait in 1 ms steps.
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*/
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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usleep(1000);
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}
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/*
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* IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
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* Program chip using firmware cycle byte programming. (SLOW!)
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*/
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int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
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{
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int total_size = 1024 * flash->total_size;
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int i;
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fast_spi = 0;
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spi_disable_blockprotect();
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for (i = 0; i < total_size; i++) {
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spi_write_enable();
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spi_byte_program(i, buf[i]);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(10);
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}
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/* resume normal ops... */
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outb(0x20, it8716f_flashport);
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return 0;
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}
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/*
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* IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
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* Need to read this big flash using firmware cycles 3 byte at a time.
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*/
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int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf)
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{
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int total_size = 1024 * flash->total_size;
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int i;
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fast_spi = 0;
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if (total_size > 512 * 1024) {
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for (i = 0; i < total_size; i += 3) {
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int toread = 3;
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if (total_size - i < toread)
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toread = total_size - i;
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spi_nbyte_read(i, buf + i, toread);
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}
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} else {
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memcpy(buf, (const char *)flash->virtual_memory, total_size);
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}
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return 0;
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}
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int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
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int total_size = 1024 * flash->total_size;
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int i;
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if (total_size > 512 * 1024) {
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it8716f_over512k_spi_chip_write(flash, buf);
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} else {
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for (i = 0; i < total_size / 256; i++) {
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spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
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}
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}
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return 0;
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}
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@ -2,7 +2,6 @@
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* This file is part of the flashrom project.
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* This file is part of the flashrom project.
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*
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*
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* Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
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* Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
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* Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
|
|
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*
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*
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* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
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|
@ -29,158 +28,8 @@
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#include "flash.h"
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#include "flash.h"
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#include "spi.h"
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#include "spi.h"
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#define ITE_SUPERIO_PORT1 0x2e
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#define ITE_SUPERIO_PORT2 0x4e
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uint16_t it8716f_flashport = 0;
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/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
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int fast_spi = 1;
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void spi_prettyprint_status_register(struct flashchip *flash);
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void spi_prettyprint_status_register(struct flashchip *flash);
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void spi_disable_blockprotect(void);
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/* Generic Super I/O helper functions */
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uint8_t regval(uint16_t port, uint8_t reg)
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{
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outb(reg, port);
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return inb(port + 1);
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}
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void regwrite(uint16_t port, uint8_t reg, uint8_t val)
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{
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outb(reg, port);
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outb(val, port + 1);
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||||||
}
|
|
||||||
|
|
||||||
/* Helper functions for most recent ITE IT87xx Super I/O chips */
|
|
||||||
#define CHIP_ID_BYTE1_REG 0x20
|
|
||||||
#define CHIP_ID_BYTE2_REG 0x21
|
|
||||||
static void enter_conf_mode_ite(uint16_t port)
|
|
||||||
{
|
|
||||||
outb(0x87, port);
|
|
||||||
outb(0x01, port);
|
|
||||||
outb(0x55, port);
|
|
||||||
if (port == ITE_SUPERIO_PORT1)
|
|
||||||
outb(0x55, port);
|
|
||||||
else
|
|
||||||
outb(0xaa, port);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void exit_conf_mode_ite(uint16_t port)
|
|
||||||
{
|
|
||||||
regwrite(port, 0x02, 0x02);
|
|
||||||
}
|
|
||||||
|
|
||||||
static uint16_t find_ite_spi_flash_port(uint16_t port)
|
|
||||||
{
|
|
||||||
uint8_t tmp = 0;
|
|
||||||
uint16_t id, flashport = 0;
|
|
||||||
|
|
||||||
enter_conf_mode_ite(port);
|
|
||||||
|
|
||||||
id = regval(port, CHIP_ID_BYTE1_REG) << 8;
|
|
||||||
id |= regval(port, CHIP_ID_BYTE2_REG);
|
|
||||||
|
|
||||||
/* TODO: Handle more IT87xx if they support flash translation */
|
|
||||||
if (id == 0x8716) {
|
|
||||||
/* NOLDN, reg 0x24, mask out lowest bit (suspend) */
|
|
||||||
tmp = regval(port, 0x24) & 0xFE;
|
|
||||||
printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
|
|
||||||
0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
|
|
||||||
printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
|
|
||||||
0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
|
|
||||||
printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
|
|
||||||
0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
|
|
||||||
printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
|
|
||||||
0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
|
|
||||||
printf("LPC write to serial flash %sabled\n",
|
|
||||||
(tmp & 1 << 4) ? "en" : "dis");
|
|
||||||
printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
|
|
||||||
/* LDN 0x7, reg 0x64/0x65 */
|
|
||||||
regwrite(port, 0x07, 0x7);
|
|
||||||
flashport = regval(port, 0x64) << 8;
|
|
||||||
flashport |= regval(port, 0x65);
|
|
||||||
}
|
|
||||||
exit_conf_mode_ite(port);
|
|
||||||
return flashport;
|
|
||||||
}
|
|
||||||
|
|
||||||
int it87xx_probe_spi_flash(const char *name)
|
|
||||||
{
|
|
||||||
it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
|
|
||||||
if (!it8716f_flashport)
|
|
||||||
it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
|
|
||||||
return (!it8716f_flashport);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* The IT8716F only supports commands with length 1,2,4,5 bytes including
|
|
||||||
command byte and can not read more than 3 bytes from the device.
|
|
||||||
This function expects writearr[0] to be the first byte sent to the device,
|
|
||||||
whereas the IT8716F splits commands internally into address and non-address
|
|
||||||
commands with the address in inverse wire order. That's why the register
|
|
||||||
ordering in case 4 and 5 may seem strange. */
|
|
||||||
static int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
|
|
||||||
{
|
|
||||||
uint8_t busy, writeenc;
|
|
||||||
int i;
|
|
||||||
|
|
||||||
do {
|
|
||||||
busy = inb(it8716f_flashport) & 0x80;
|
|
||||||
} while (busy);
|
|
||||||
if (readcnt > 3) {
|
|
||||||
printf("%s called with unsupported readcnt %i.\n",
|
|
||||||
__FUNCTION__, readcnt);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
switch (writecnt) {
|
|
||||||
case 1:
|
|
||||||
outb(writearr[0], it8716f_flashport + 1);
|
|
||||||
writeenc = 0x0;
|
|
||||||
break;
|
|
||||||
case 2:
|
|
||||||
outb(writearr[0], it8716f_flashport + 1);
|
|
||||||
outb(writearr[1], it8716f_flashport + 7);
|
|
||||||
writeenc = 0x1;
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
outb(writearr[0], it8716f_flashport + 1);
|
|
||||||
outb(writearr[1], it8716f_flashport + 4);
|
|
||||||
outb(writearr[2], it8716f_flashport + 3);
|
|
||||||
outb(writearr[3], it8716f_flashport + 2);
|
|
||||||
writeenc = 0x2;
|
|
||||||
break;
|
|
||||||
case 5:
|
|
||||||
outb(writearr[0], it8716f_flashport + 1);
|
|
||||||
outb(writearr[1], it8716f_flashport + 4);
|
|
||||||
outb(writearr[2], it8716f_flashport + 3);
|
|
||||||
outb(writearr[3], it8716f_flashport + 2);
|
|
||||||
outb(writearr[4], it8716f_flashport + 7);
|
|
||||||
writeenc = 0x3;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
printf("%s called with unsupported writecnt %i.\n",
|
|
||||||
__FUNCTION__, writecnt);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
/* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
|
|
||||||
* Note:
|
|
||||||
* We can't use writecnt directly, but have to use a strange encoding.
|
|
||||||
*/
|
|
||||||
outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
|
|
||||||
|
|
||||||
if (readcnt > 0) {
|
|
||||||
do {
|
|
||||||
busy = inb(it8716f_flashport) & 0x80;
|
|
||||||
} while (busy);
|
|
||||||
|
|
||||||
for (i = 0; i < readcnt; i++) {
|
|
||||||
readarr[i] = inb(it8716f_flashport + 5 + i);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
|
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
|
||||||
{
|
{
|
||||||
|
|
@ -390,28 +239,13 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Page size is usually 256 bytes */
|
|
||||||
void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
|
|
||||||
int i;
|
|
||||||
|
|
||||||
spi_write_enable();
|
|
||||||
outb(0x06 , it8716f_flashport + 1);
|
|
||||||
outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
|
|
||||||
for (i = 0; i < 256; i++) {
|
|
||||||
bios[256 * block + i] = buf[256 * block + i];
|
|
||||||
}
|
|
||||||
outb(0, it8716f_flashport);
|
|
||||||
/* Wait until the Write-In-Progress bit is cleared.
|
|
||||||
* This usually takes 1-10 ms, so wait in 1 ms steps.
|
|
||||||
*/
|
|
||||||
while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
|
|
||||||
usleep(1000);
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
|
void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
|
||||||
{
|
{
|
||||||
if (it8716f_flashport)
|
if (it8716f_flashport) {
|
||||||
it8716f_spi_page_program(block, buf, bios);
|
it8716f_spi_page_program(block, buf, bios);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -452,29 +286,7 @@ void spi_disable_blockprotect(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
void spi_nbyte_read(int address, uint8_t *bytes, int len)
|
||||||
* IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
|
|
||||||
* Program chip using firmware cycle byte programming. (SLOW!)
|
|
||||||
*/
|
|
||||||
int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
|
|
||||||
{
|
|
||||||
int total_size = 1024 * flash->total_size;
|
|
||||||
int i;
|
|
||||||
fast_spi = 0;
|
|
||||||
|
|
||||||
spi_disable_blockprotect();
|
|
||||||
for (i = 0; i < total_size; i++) {
|
|
||||||
spi_write_enable();
|
|
||||||
spi_byte_program(i, buf[i]);
|
|
||||||
while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
|
|
||||||
myusec_delay(10);
|
|
||||||
}
|
|
||||||
/* resume normal ops... */
|
|
||||||
outb(0x20, it8716f_flashport);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_3byte_read(int address, uint8_t *bytes, int len)
|
|
||||||
{
|
{
|
||||||
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ,
|
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ,
|
||||||
(address >> 16) & 0xff,
|
(address >> 16) & 0xff,
|
||||||
|
|
@ -486,39 +298,19 @@ void spi_3byte_read(int address, uint8_t *bytes, int len)
|
||||||
spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
|
spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
|
|
||||||
* Need to read this big flash using firmware cycles 3 byte at a time.
|
|
||||||
*/
|
|
||||||
int spi_chip_read(struct flashchip *flash, uint8_t *buf)
|
int spi_chip_read(struct flashchip *flash, uint8_t *buf)
|
||||||
{
|
{
|
||||||
int total_size = 1024 * flash->total_size;
|
if (it8716f_flashport)
|
||||||
int i;
|
return it8716f_spi_chip_read(flash, buf);
|
||||||
fast_spi = 0;
|
printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
|
||||||
|
return 1;
|
||||||
if (total_size > 512 * 1024) {
|
|
||||||
for (i = 0; i < total_size; i += 3) {
|
|
||||||
int toread = 3;
|
|
||||||
if (total_size - i < toread)
|
|
||||||
toread = total_size - i;
|
|
||||||
spi_3byte_read(i, buf + i, toread);
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
memcpy(buf, (const char *)flash->virtual_memory, total_size);
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int spi_chip_write(struct flashchip *flash, uint8_t *buf) {
|
int spi_chip_write(struct flashchip *flash, uint8_t *buf)
|
||||||
int total_size = 1024 * flash->total_size;
|
{
|
||||||
int i;
|
if (it8716f_flashport)
|
||||||
if (total_size > 512 * 1024) {
|
return it8716f_spi_chip_write(flash, buf);
|
||||||
it8716f_over512k_spi_chip_write(flash, buf);
|
printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
|
||||||
} else {
|
return 1;
|
||||||
for (i = 0; i < total_size / 256; i++) {
|
|
||||||
spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue