volteer/variants/eldrid: Goodix touch panel power-on sequence tuning

1. Enable panel stop GPIO in ramstage
2. generic.reset_delay_ms change to 30

BUG=b:171365316
Signed-off-by: Nick Chen <nick_xr_chen@wistron.corp-partner.google.com>
Change-Id: I90ca39312252c668da6298183e598392bc9f9f28
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
This commit is contained in:
Nick Chen 2020-11-12 18:18:33 +08:00 committed by Patrick Georgi
parent e41f595310
commit b7a55fd804
2 changed files with 2 additions and 2 deletions

View File

@ -80,7 +80,7 @@ static const struct pad_config override_gpio_table[] = {
/* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
/* E3 : CPU_GP0 ==> USI_REPORT_EN */
PAD_CFG_GPO(GPP_E3, 1, DEEP),
PAD_CFG_GPO(GPP_E3, 0, DEEP),
/* E4 : SATA_DEVSLP0 ==> M2_SSD_PE_WAKE_ODL */
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
/* E6 : THC0_SPI1_RST# ==> GPP_E6_STRAP */

View File

@ -123,7 +123,7 @@ chip soc/intel/tigerlake
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
register "generic.reset_delay_ms" = "120"
register "generic.reset_delay_ms" = "30"
register "generic.reset_off_delay_ms" = "3"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.enable_delay_ms" = "12"